Logical addresses and Physical memory mapping

Logical addresses are generated by the CPU during the execution of a program. These addresses are virtual addresses that are independent of the underlying physical memory. The CPU uses logical addresses to access data and instructions in memory.

Physical memory refers to the actual physical locations in the memory hardware where data and instructions are stored. Each physical memory location has a unique physical address.

Mapping logical addresses to physical memory

The mapping of logical addresses to physical memory is performed by the Memory Management Unit (MMU) in the CPU. The MMU is responsible for translating logical addresses into physical addresses, allowing the CPU to access the correct physical location in memory.

The role of the MMU

The MMU uses various mechanisms to perform the mapping of logical addresses to physical addresses. One of the key mechanisms used by the MMU is the Translation Lookaside Buffer (TLB). The TLB is a cache that stores recently accessed translations between logical addresses and physical addresses. This cache helps to improve the performance of address translation by reducing the number of memory accesses required.

Relocation register

The relocation register is a hardware register that is used to perform dynamic address translation. It is used to adjust the logical addresses generated by the CPU to the correct physical addresses in memory. The relocation register contains the base address of the current memory partition or segment, and it is added to the logical address to obtain the corresponding physical address.

The correct answer

The correct answer to the given question is option 'C', MMU. The MMU is responsible for mapping logical addresses to physical memory. It performs this mapping using mechanisms such as the TLB and the relocation register. The TLB caches recently accessed translations, while the relocation register adjusts the logical addresses to the correct physical addresses. Therefore, the MMU plays a crucial role in the address translation process.