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A computer system has an L1 cache, an L2 cache, and a main memory unit connected as shown below. The block size in L1cache is 4 words. The block size in L2 cache is 16 words. The memory access times are 2 nanoseconds, 20 nano seconds and 200 nanoseconds for L1 cache, L2 cache and the main memory unit respectively.
When there is a miss in L1 cache and a hit in L2 cache, a block is transferred from L2 cache to L1 cache. What is the timetaken for this transfer?
  • a)
    222 nanoseconds
  • b)
    888 nanoseconds
  • c)
    902 nanoseconds
  • d)
    968 nanoseconds
Correct answer is option 'C'. Can you explain this answer?
Verified Answer
A computer system has an L1 cache, an L2 cache, and a main memory unit...
The transfer time should be 4*200 + 20 = 820 ns. But this is not in option. So, I assume the following is what is meant by the question.
L2 block size being 16 words and data width between memory and L2 being 4 words, we require 4 memory accesses(for read) and 4 L2 accesses (for store). Now, we need to send the requested block to L1 which would require one more L2 access (for read) and one L1 access (for store). So, total time
= 4 * (200 + 20) + (20 + 2)
= 880 + 22
= 902 ns
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A computer system has an L1 cache, an L2 cache, and a main memory unit connected as shown below. The block size in L1cache is 4 words. The block size in L2 cache is 16 words. The memory access times are 2 nanoseconds, 20 nano seconds and 200 nanoseconds for L1 cache, L2 cache and the main memory unit respectively.When there is a miss in L1 cache and a hit in L2 cache, a block is transferred from L2 cache to L1 cache. What is the timetaken for this transfer?a)222 nanosecondsb)888 nanosecondsc)902 nanosecondsd)968 nanosecondsCorrect answer is option 'C'. Can you explain this answer?
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A computer system has an L1 cache, an L2 cache, and a main memory unit connected as shown below. The block size in L1cache is 4 words. The block size in L2 cache is 16 words. The memory access times are 2 nanoseconds, 20 nano seconds and 200 nanoseconds for L1 cache, L2 cache and the main memory unit respectively.When there is a miss in L1 cache and a hit in L2 cache, a block is transferred from L2 cache to L1 cache. What is the timetaken for this transfer?a)222 nanosecondsb)888 nanosecondsc)902 nanosecondsd)968 nanosecondsCorrect answer is option 'C'. Can you explain this answer? for Computer Science Engineering (CSE) 2024 is part of Computer Science Engineering (CSE) preparation. The Question and answers have been prepared according to the Computer Science Engineering (CSE) exam syllabus. Information about A computer system has an L1 cache, an L2 cache, and a main memory unit connected as shown below. The block size in L1cache is 4 words. The block size in L2 cache is 16 words. The memory access times are 2 nanoseconds, 20 nano seconds and 200 nanoseconds for L1 cache, L2 cache and the main memory unit respectively.When there is a miss in L1 cache and a hit in L2 cache, a block is transferred from L2 cache to L1 cache. What is the timetaken for this transfer?a)222 nanosecondsb)888 nanosecondsc)902 nanosecondsd)968 nanosecondsCorrect answer is option 'C'. Can you explain this answer? covers all topics & solutions for Computer Science Engineering (CSE) 2024 Exam. Find important definitions, questions, meanings, examples, exercises and tests below for A computer system has an L1 cache, an L2 cache, and a main memory unit connected as shown below. The block size in L1cache is 4 words. The block size in L2 cache is 16 words. The memory access times are 2 nanoseconds, 20 nano seconds and 200 nanoseconds for L1 cache, L2 cache and the main memory unit respectively.When there is a miss in L1 cache and a hit in L2 cache, a block is transferred from L2 cache to L1 cache. What is the timetaken for this transfer?a)222 nanosecondsb)888 nanosecondsc)902 nanosecondsd)968 nanosecondsCorrect answer is option 'C'. Can you explain this answer?.
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