Consider a three-level page table to translate a 39-bit virtual addres...
Given,
- Virtual address (VA) = 39 bits
- Page size = 4 KB
- Physical address (PA) = 2 GB
- Page table entry size (PTE) = 8 B
- Three level pages tables with address division (9, 9, 9, 12)
Three level pages tables with address division (9, 9, 9, 12) means:
- 9 most significant bits for indexing into the level−1 (outer level).
- 9 bits for the level−2 index.
- 9 bits for the level−3 index.
- 12 bits for the offset within a page.
The entries of the level−1 page table are pointers to a level−2 page table, the entries of the level−2 page table are pointers to a level−3 page table, and the entries of the level−3 page table is PTEs that contain actual frame number where our desired word resides.
9 bits for a level means 29 entries in the one-page table of that level.
For our process P:
P is using 2 GB of its VM. The rest of its VM is unused.
2 GB VM will have 2 GB/4 KB = 219 Pages.
But level −3 page table has only 29 entries. So, one-page table of level −3 can point to 29 pages of VM only. So, we need 210 level−3 page tables of process P.
So, at level−3, we have 210 page tables. So, we need 210 entries in level−2. But level −2 page table has only 29 entries, so, one-page table of level −2 can only point to 29 page tables of level−3. So, we need 2 level−2 page tables.
So, we need 1 level−1 page table to point to level−2 page tables.
So, for process P, we need only 1 level−1 page table, 2 level−2 page tables, and 210 level−3 page tables.
Note that, all the page tables, at every level, have the same size which is 29 × 8 B = 212 B = 4 KB (because every page table at every level has 29 entries and page table entry size at every level is 8 B ).
So, in total, we need 1 + 2 + 210 page tables (1 level−1,2 level−2,210 level−3, and each page table size is 4 KB.
So, total page tables size,
= 1027 × 4 KB
= 4108 KB
Hence, the correct option is (A).