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Which of the following is correct for a gated D-type flip-flop?
  • a)
    The Q output is either SET or RESET as soon as the D input goes HIGH or LOW
  • b)
    The output complement follows the input when enabled
  • c)
    Only one of the inputs can be HIGH at a time
  • d)
    The output toggles if one of the inputs is held HIGH
Correct answer is option 'A'. Can you explain this answer?
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Which of the following is correct for a gated D-type flip-flop?a)The Q...
In D flip flop, when the clock is high then the output depends on the input otherwise reminds previous output. In a state of clock high, when D is high the output Q also high, if D is ‘0’ then output is also zero. Like SR flip-flop, the D-flip-flop also have an invalid state at both inputs being 1.
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Which of the following is correct for a gated D-type flip-flop?a)The Q output is either SET or RESET as soon as the D input goes HIGH or LOWb)The output complement follows the input when enabledc)Only one of the inputs can be HIGH at a timed)The output toggles if one of the inputs is held HIGHCorrect answer is option 'A'. Can you explain this answer?
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