A digital computer has a memory unit of 256k x 16 and a cache memory of 4k words. The cache uses direct mapping with a block size of 16 words.Q. How many bits are there in index, tag, block and words fields of address format ?a)10, 6, 8, 2b)12, 6, 8, 4c)12, 8, 6, 4d)10, 6, 8, 4Correct answer is option 'B'. Can you explain this answer?

Question

Answer

Main Memory has 256k = 2⁸ x 2¹⁰ = 2¹⁸.
i.e. We need 18 bits to address main memory.
Cache Memory has 4k = 2² x 2¹⁰ = 2¹².
i.e. We need 12 bits to address cache memory.

Cache consists of Index and tag which together are used to address main memory location.
Here Index is 12 bits and tag is 6 bits. (18 – 12 = 6).

Index is divided into block part and word part. Block part is used to address blocks in cache and word part addresses individual word in a block.

Here a block size is 16 words. i.e. 2⁴, we need 4 bits to address a word and 12 – 4 = 8 bits to address a block in cache memory.

Answer

Understanding the Memory Structure
The digital computer has a memory unit of 256k x 16 bits and a cache memory of 4k words. To determine the address format, we need to analyze the components involved in the cache memory.
Memory Details
- Main Memory Size: 256k words (16 bits each)
- Cache Memory Size: 4k words
- Block Size: 16 words
Calculating Address Fields
1. Total Addressable Memory:
- The main memory consists of 256k words, which translates to 256 x 1024 = 262144 words.
- Each word has a size of 16 bits.
2. Total Number of Cache Blocks:
- Cache size = 4k words = 4096 words.
- With a block size of 16 words, the number of blocks in cache = 4096 / 16 = 256 blocks.
3. Address Breakdown:
- Word Offset:
- Since each block contains 16 words, we need 4 bits to address each word within a block (2^4 = 16).
- Index:
- The cache has 256 blocks, which requires 8 bits for the index (2^8 = 256).
- Tag:
- The main memory has 262144 words, which requires 18 bits for a unique address (2^18 = 262144).
- Therefore, the tag bits = Total bits - (Index bits + Word Offset bits) = 18 - (8 + 4) = 6 bits.
Final Breakdown
- Tag: 6 bits
- Index: 8 bits
- Block Offset: 4 bits (indicating which word in the block)
Thus, the correct answer is option B: 12, 6, 8, 4.

Answer

Main Memory has 256k = 2⁸ x 2¹⁰ = 2¹⁸.
i.e. We need 18 bits to address main memory.
Cache Memory has 4k = 2² x 2¹⁰ = 2¹².
i.e. We need 12 bits to address cache memory.

Cache consists of Index and tag which together are used to address main memory location.
Here Index is 12 bits and tag is 6 bits. (18 – 12 = 6).

Index is divided into block part and word part. Block part is used to address blocks in cache and word part addresses individual word in a block.

Here a block size is 16 words. i.e. 2⁴, we need 4 bits to address a word and 12 – 4 = 8 bits to address a block in cache memory.

Similar Computer Science Engineering (CSE) Doubts

A digital computer has a memory unit of 256k x 16 and a cache memory of 4k words. The cache uses direct mapping with a block size of 16 words.Q.How many blocks can cache accommodate ?

Consider a computer with 8 Mbytes of main memory and a 128 K cache. The cache block size is 4 K. It uses a direct mapping scheme for cache management. How many different main memory blocks can map onto a given physical cache block?

Consider direct mapping implementation of a cache of size 16 MB. The main memory has a capacity of 1 GB. Let the number of tag bits required is x and the comparator latency is 20x ns. What is the hit latency? Correct answer is '120'. Can you explain this answer?

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