CHARACTERISTICS OF N-CHANNEL JFET :-
The family of curves that shows the relation between current and voltage are known as characteristic curves.
There are two important characteristics of a JFET.
Drain characteristics show the relation between the drain to source voltage Vds and drain current Id. In order to explain typical drain characteristics let us consider the curve with Vgs= 0 V.
1. When Vds is applied and it is increasing the drain current Id also increases linearly up to knee point.
2. This shows that FET behaves like an ordinary resistor. This region is called as ohmic region.
3. Id increases with increase in drain to source voltage. Here the drain current is increased slowly as compared to ohmic region.
4. It is because of the fact that there is an increase in Vds. This in turn increases the reverse bias voltage across the gate source junction. As a result of this depletion region grows in size thereby reducing the effective width of the channel.
5. All the drain to source voltage corresponding to point the channel width is reduced to a minimum value and is known as pinch off.
6. The drain to source voltage at which channel pinch off occurs is called pinch off voltage(Vp).
PINCH OFF Region:-
Id =Idss [1-Vgs/Vp]2
This is known as shokley’s relation.
These curves show the relationship between drain current Id and gate to source voltage Vgs for different values of Vds.
DIFFERENCE BETWEEN Vp AND Vgsoff –
Vp is the value of Vgs that causes the JFET to become constant current component, It is measured at Vgs=0 V and has a constant drain current of Id =Idss .Where Vgsoff is the value of Vgs that reduces Id to approximately zero.
Why the gate to source junction of a JFET be always reverse biased ?
The gate to source junction of a JFET is never allowed to become forward biased because the gate material is not designed to handle any significant amount of current. If the junction is allowed to become forward biased, current is generated through the gate material. This current may destroy the component.
There is one more important characteristic of JFET reverse biasing i.e. JFET's have extremely high characteristic gate input impedance. This impedance is typically in the high mega ohm range. With the advantage of extremely high input impedance it draws no current from the source. The high input impedance of the JFET has led to its extensive use in integrated circuits. The low current requirements of the component makes it perfect for use in ICs where thousands of transistors must be etched on to a single piece of silicon. The low value of current helps the IC to remain relatively cool, thus allowing more components to be placed in a smaller physical area.
The electrical behavior of JFET may be described in terms of certain parameters. Such parameters are obtained from the characteristic curves.
A C Drain resistance(rd):
It is also called dynamic drain resistance and is the a.c.resistance between the drain and source terminal,when the JFET is operating in the pinch off or saturation region. It is given by the ratio of small change in drain to source voltage ∆Vds to the corresponding change in drain current ∆Id for a constant gate to source voltage Vgs.
Mathematically, it is expressed as rd=∆Vds/ ∆Id where Vgs is held constant.
It is also called forward transconductance. It is given by the ratio of small change in drain current (∆Id) to the corresponding change in gate to source voltage (∆Vds)
Mathematically, the transconductance can be written as-
AMPLIFICATION FACTOR (µ)
It is given by the ratio of small change in drain to source voltage (∆Vds) to the corresponding change in gate to source voltage (∆Vgs)for a constant drain current (Id).
Thus µ=∆Vds/∆Vgs when Id held constant
The amplification factor µ may be expressed as a product of transconductance (gm)and ac drain resistance (rd)-
THE FET SMALL SIGNAL MODEL:-
The linear small signal equivalent circuit for the FET can be obtained in a manner similar to that used to derive the corresponding model for a transistor.
We can express the drain current Id as a function of the gate voltage and drain voltage Vds.
The transconductance gm and drain resistance rd:-
If both gate voltage and drain voltage are varied, the change in the drain current is approximated by using Taylor's series considering only the first two terms in the expansion:
Is the mutual conductance or transconductance .It is also called as gfs or yfs common source forward conductance .
The second parameter rd is the drain resistance or output resistance defined as:
The reciprocal of the rd is the drain conductance gd. It is also designated by Yos and Gos and called the common source output conductance . So the small signal equivalent circuit for FET can be drawn in two different ways:
1.small signal current –source model
2.small signal voltage-source model.
A small signal current –source model for FET in common source configuration can be drawn satisfying Eq→(1) as shown in the figure(a)
This low frequency model for FET has a Norton’s output circuit with a dependent current generator whose magnitude is proportional to the gate-to-source voltage. The proportionality factor is the transconductance ‘gm’. The output resistance is ‘rd’. The input resistance between the gate and source is infinite, since it is assumed that the reverse biased gate draws no current. For the same reason the resistance between gate and drain is assumed to be infinite.
The small signal voltage-source model is shown in the figure(b).
This can be derived by finding the Thevenin’s equivalent for the output part of fig(a) .
These small signal models for FET can be used for analyzing the three basic FET amplifier configurations:
1.common source (CS) 2.common drain (CD) or source follower
3. common gate(CG).
(a)Small Signal Current source model for FET (b)Small Signal voltage source model for FET
Here the input circuit is kept open because of having high input impedance and the output circuit satisfies the equation for Id.