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# Introduction: A Simple ALU Notes | EduRev

## Electrical Engineering (EE) : Introduction: A Simple ALU Notes | EduRev

The document Introduction: A Simple ALU Notes | EduRev is a part of the Electrical Engineering (EE) Course Digital Electronics.
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## An Arithmetic and Logic Unit ## Connecting Digital Circuits Together.

Digital Electronics Modules 2 to 5 have described how Basic logic qates may be combined, not only to perform standard logic, fuction but to build circuits that can perform complex logic tasks. Both small scale integrated (SSI) and medium scale integrated (MSI) chips are available in many forms, that can be directly connected together to make very complex circuits. It is this inter-connectivity that makes digital electronics so powerful and so versatile.

The standard circuits described in modules 2 to 5, both combinational  and sequential, can be used to perform arithmetic operations such as addition, subtraction and counting, as well as logical operations such as combining data sources (multiplexing) and shifting bits left or right within a binary word.

As explained in Module .1 binary arithmetic is normally carried out electronically by using twos complement notation, The most common and versatile method of carrying out such operations is in an Arithmetic and Logic Unit (ALU), a circuit that forms the heart of any calculating or computing system.

## The Arithmetic and Logic Unit

A simplified ALU is illustrated in Fig 5.8.1, which uses an arrangement of both combinational and sequential circuits from those described in modules 2 to 5. Their purpose is to perform the basic (though still complex) binary arithmetic described in Module 1.

Data passing through the ALU circuit does so on a system of buses, shown by the broad arrows in Fig. 5.8.1. These buses consist of groups of wires (usually as 8 parallel bits in simple systems) each carrying a single  byte of binary data. In this system, data word A is the primary data source, and data word B is the secondary data source that may be added to, or subtracted from word A.

The ALU can also perform other operations. It can increment, add 1 to word A, or decrement, subtract 1 from it. By complementing (inverting) the logic value of individual bits of the data word A and adding 1 to the result, it is possible to use twos complement arithmetic to perform subtractions.

The shift register at the ALU output can also perform a ‘logical shift-left’ on word A by shifting the 8 bits consecutively into the carry bit, alternatively the shift register can create a rotating pattern of bits, rotating left, and using the  carry bit as a ninth bit in the sequence, or rotate the 8 bits right ignoring the carry bit. Any of these functions can be selected by the control block, using various combinations of the eight control lines shown in Fig. 5.8.1.

Putting the correct pattern of 1s and 0s (the control word) on the control lines will cause the ALU to perform the required arithmetic or logical operation on the data being input at A and B. With a control word of 8-bits, this could potentially allow up to 256 different combinations, or control words, which would be more than ample, even for very complex microprocessors or micro controllers. However this basic ALU needs only eight control words to control the different operations available.

To see the ALU operate as described below, you can download our free, fully interactive Logisim ALU circuit  (assuming you have the free Logisim Digital Simulator installed on your desktop or laptop computer), see our  extra logisim page for details. ## The Component Parts

Any of the component parts of the Logisim design can be examined in detail by double clicking on the component (in simulation mode). To return to the main document, click ‘main’ in the component menu at the left of the screen.

Note: In this section the tilde character ~ is used where necessary to indicate NOT (e.g. ~LE = LE) to match the usage in the Logisim simulations.

## Multiplexers

MUX 1 and MUX 3 are identical 8 bit multiplexers that select either the input data word A (MUX 1) or data word B (MUX 3) or their internally generated complement, as shown in Fig. 5.8.3.

MUX 2 is a similar design but selects either the data word B or the zero value 00HEX , as shown in Fig. 5.8.4. Offer running on EduRev: Apply code STAYHOME200 to get INR 200 off on our premium plan EduRev Infinity!

## Digital Electronics

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