PPT: Asynchronous & Synchronous Counters | Analog and Digital Electronics - Electrical Engineering (EE) PDF Download

 Page 1


DIGITAL SYSTEMS TCE1111
1
Asynchronous  and Synchronous Counters
Page 2


DIGITAL SYSTEMS TCE1111
1
Asynchronous  and Synchronous Counters
DIGITAL SYSTEMS TCE1111
2
* Counters are important digital electronic circuits.
* They are Sequential logic circuits because  timing
is obviously important and they need a memory
characteristic.
* Digital counters have the following important
characteristics,
1. Maximum number of count
2. Up-Down Count
3. Asynchronous or Synchronous Operation
4. Free-Running or Self-Stopping
Counters
Page 3


DIGITAL SYSTEMS TCE1111
1
Asynchronous  and Synchronous Counters
DIGITAL SYSTEMS TCE1111
2
* Counters are important digital electronic circuits.
* They are Sequential logic circuits because  timing
is obviously important and they need a memory
characteristic.
* Digital counters have the following important
characteristics,
1. Maximum number of count
2. Up-Down Count
3. Asynchronous or Synchronous Operation
4. Free-Running or Self-Stopping
Counters
DIGITAL SYSTEMS TCE1111
3
Asynchronous/Ripple Counter
 Asynchronous counter are commonly referred to as ripple
counter because the effect of the input clock pulse is first
“felt” by first flip-flop (FF0).
 Cannot get to the second flip-flop (FF1) immediately
because of the propagation delay through FF0.
 So the effect of an input clock pulse “ripples” through the
counter, taking some time, due to propagation delays, to
reach the last flip-flop.
Only the first FF receive clock pulse from the source ( clock
genarator), others FFs receive clock pulse from either Q or Q’
of prior FF
Page 4


DIGITAL SYSTEMS TCE1111
1
Asynchronous  and Synchronous Counters
DIGITAL SYSTEMS TCE1111
2
* Counters are important digital electronic circuits.
* They are Sequential logic circuits because  timing
is obviously important and they need a memory
characteristic.
* Digital counters have the following important
characteristics,
1. Maximum number of count
2. Up-Down Count
3. Asynchronous or Synchronous Operation
4. Free-Running or Self-Stopping
Counters
DIGITAL SYSTEMS TCE1111
3
Asynchronous/Ripple Counter
 Asynchronous counter are commonly referred to as ripple
counter because the effect of the input clock pulse is first
“felt” by first flip-flop (FF0).
 Cannot get to the second flip-flop (FF1) immediately
because of the propagation delay through FF0.
 So the effect of an input clock pulse “ripples” through the
counter, taking some time, due to propagation delays, to
reach the last flip-flop.
Only the first FF receive clock pulse from the source ( clock
genarator), others FFs receive clock pulse from either Q or Q’
of prior FF
DIGITAL SYSTEMS TCE1111
4
Propagation delays in a 3-bit asynchronous (ripple-clocked) binary counter.
Asynchronous/Ripple Counter
Page 5


DIGITAL SYSTEMS TCE1111
1
Asynchronous  and Synchronous Counters
DIGITAL SYSTEMS TCE1111
2
* Counters are important digital electronic circuits.
* They are Sequential logic circuits because  timing
is obviously important and they need a memory
characteristic.
* Digital counters have the following important
characteristics,
1. Maximum number of count
2. Up-Down Count
3. Asynchronous or Synchronous Operation
4. Free-Running or Self-Stopping
Counters
DIGITAL SYSTEMS TCE1111
3
Asynchronous/Ripple Counter
 Asynchronous counter are commonly referred to as ripple
counter because the effect of the input clock pulse is first
“felt” by first flip-flop (FF0).
 Cannot get to the second flip-flop (FF1) immediately
because of the propagation delay through FF0.
 So the effect of an input clock pulse “ripples” through the
counter, taking some time, due to propagation delays, to
reach the last flip-flop.
Only the first FF receive clock pulse from the source ( clock
genarator), others FFs receive clock pulse from either Q or Q’
of prior FF
DIGITAL SYSTEMS TCE1111
4
Propagation delays in a 3-bit asynchronous (ripple-clocked) binary counter.
Asynchronous/Ripple Counter
DIGITAL SYSTEMS TCE1111
5
Three-bit asynchronous binary counter and its timing diagram for one cycle.
Asynchronous/Ripple Counter
Clk
pulse
Q2 Q1 Q0
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1
8
(REPEAT
)
0 0 0
RIPPLE COUNTER UP – PGT AND ALL NON FIRST CLK RECEIVE
CLK PLUSE  FROM Q’