|1 Crore+ students have signed up on EduRev. Have you?|
TRANSISTOR AS A SWITCH
The transistor is used as a switch therefore it is used only between saturation and cutoff. From fig. 5 we can write the following equations
Fig. 6: Transistor Switch
If the base current is increased above I BM ,VBE increases, the collector current increases and VCE falls below VBE . This continues until the CBJ is forward biased with VBC
of about 0.4 to 0.5V, the transistor than goes into saturation. The transistor saturation may be defined as the point above which any increase in the base current does not increase the collector current significantly.
In saturation, the collector current remains almost constant. If the collector emitter voltage is VCE sat the collector current is
VBE increases due to increased base current resulting in increased power loss. Once the
transistor is saturated, the CE voltage is not reduced in relation to increase in base current. However the power is increased at a high value of ODF, the transistor may be damaged it may operate in active region, VCE increases resulting in increased power loss.
A forward biased p-n junction exhibits two parallel capacitances; a depletion layer capacitance and a diffusion capacitance. On the other hand, a reverse biased p-n junction has only depletion capacitance. Under steady state the capacitances do not play any role. However under transient conditions, they influence turn-on and turn-off behavior of the transistor.
TRANSIENT MODEL OF BJT
Due to internal capacitances, the transistor does not turn on instantly. As the voltage VB rises from zero to V1 and the base current rises to IB1, the collector current does not respond immediately. There is a delay known as delay time td, before any collector current flows. The delay is due to the time required to charge up the BEJ to the forward bias voltage VBE(0.7V). The collector current rises to the steady value of ICS and this time is called rise time tr.
The base current is normally more than that required to saturate the transistor. As a result excess minority carrier charge is stored in the base region. The higher the ODF, the greater is the amount of extra charge stored in the base. This extra charge which is called the saturating charge is proportional to the excess base drive.
This extra charge which is called the saturating charge, is proportional to the excess base drive and the corresponding current Ie.
When the input voltage is reversed from V1 to -V2, the reverse current –IB2 helps to discharge the base. Without –IB2 the saturating charge has to be removed entirely due to recombination and the storage time ts would be longer.
Once the extra charge is removed, BEJ charges to the input voltage –V2 and the base current falls to zero. tf depends on the time constant which is determined by the reverse biased BEJ capacitance.
Turn-on time ton : The turn-on time can be decreased by increasing the base drive for a fixed value of collector current. td is dependent on input capacitance does not change significantly with IC . However tr increases with increase in IC .
Turn off time toff : The storage time ts is dependent on over drive factor and does not change significantly with IC. tf is a function of capacitance and increases with IC.
ts & tf can be reduced by providing negative base drive during turn-off. tf is less sensitive to negative base drive.
Cross-over tC : The crossover time tC is defined as the interval during which the collector voltage VCE rises from 10% of its peak off state value and collector current. IC falls to 10% of its on-state value. tC is a function of collector current negative base drive.
1.13 POWER DERATING
BREAK DOWN VOLTAGES
A break down voltage is defined as the absolute maximum voltage between two terminals with the third terminal open, shorted or biased in either forward or reverse direction.
BVSUS : The maximum voltage between the collector and emitter that can be sustained across the transistor when it is carrying substantial collector current.
BVCEO : The maximum voltage between the collector and emitter terminal with base open circuited.
BVCBO : This is the collector to base break down voltage when emitter is open circuited.
BASE DRIVE CONTROL
This is required to optimize the base drive of transistor. Optimization is required to increase switching speeds. ton can be reduced by allowing base current peaking during
can be increased to a sufficiently high value to maintain the transistor in quasi-saturation region. toff can be reduced by reversing base current and allowing base current peaking during turn off since increasing IB 2 decreases storage time.
A typical waveform for base current is shown.
Some common types of optimizing base drive of transistor are
When input voltage is turned on, the base current is limited by resistor R1 and C1 discharges through R2. The discharging time constant is 2 R2 C1 . To allow sufficient charging and discharging time, the width of base pulse must be t1 1 and off
If the input voltage is changed to during turn-off the capacitor voltage VC is added to V2 as reverse voltage across the transistor. There will be base current peaking during turn off. As the capacitor C1 discharges, the reverse voltage will be reduced to a steady state value, V2 . If different turn-on and turn-off characteristics are required, a turn-off Circuit Using C 2 , R3 & R4 maybe added. The diode D1 isolates the forward base drive circuit from the reverse base drive circuit during turn off.
PROPORTIONAL BASE CONTROL
This type of control has advantages over the constant drive circuit. If the collector current changes due to change in load demand, the base drive current is changed in proportion to collector current.
When switch S1 is turned on a pulse current of short duration would flow through the base of transistor Q1 and Q1 is turned on into saturation. Once the collector current starts to flow, a corresponding base current is induced due to transformer action. The transistor would latch on itself and S1 can be turned off. For proper operation of the circuit, the magnetizing current which must be much smaller than the collector current should be as small as possible. The switch S1 can be implemented by a small signal transistor and additional arrangement is necessary to discharge capacitor C1 and reset the transformer core during turn-off of the power transistor.
If a transistor is driven hard, the storage time which is proportional to the base current increases and the switching speed is reduced. The storage time can be reduced by operating the transistor in soft saturation rather than hard saturation. This can be accomplished by clamping CE voltage to a pre-determined level and the collector current
is given by IC
Where VCM is the clamping voltage and VCM VCE sat .
This means that the CE voltage is raised above saturation level and there are no excess carriers in the base and storage time is reduced.
The clamping action thus results a reduced collector current and almost elimination of the storage time. At the same time, a fast turn-on is accomplished.
However, due to increased VCE , the on-state power dissipation in the transistor is increased, whereas the switching power loss is decreased.
ADVANTAGES OF BJT’S
DEMERITS OF BJT Drive circuit of BJT is complex.
INTRODUCTION TO FET’S
FET’s use field effect for their operation. FET is manufactured by diffusing two areas of p-type into the n-type semiconductor as shown. Each p-region is connected to a gate terminal; the gate is a p-region while source and drain are n-region. Since it is similar to two diodes one is a gate source diode and the other is a gate drain diode.
In BJT’s we forward bias the B-E diode but in a JFET, we always reverse bias the gate-source diode. Since only a small reverse current can exist in the gate lead. Therefore IG 0 , therefore Rin ideal
The term field effect is related to the depletion layers around each p-region as shown. When the supply voltage VDD is applied as shown it forces free electrons to flow
from source to drain. With gate reverse biased, the electrons need to flow from source to drain, they must pass through the narrow channel between the two depletion layers. The more the negative gate voltage is the tighter the channel becomes.
Therefore JFET acts as a voltage controlled device rather than a current controlled
JFET has almost infinite input impedance but the price paid for this is loss of control over the output current, since JFET is less sensitive to changes in the output voltage than a BJT.
The maximum drain current out of a JFET occurs when VGS 0 As VDS is increased for 0 to a few volts, the current will increase as determined by ohms law. As VDS approaches VP the depletion region will widen, carrying a noticeable reduction in channel width. If VDS is increased to a level where the two depletion region would touch a pinch-off will result. ID now maintains a saturation level IDSS . Between 0 volts and pinch off voltage VP is the ohmic region. After VP , the regions constant current or active
If negative voltage is applied between gate and source the depletion region similar to those obtained with VGS 0 are formad but at lower values of VDS . Therefore saturation level is reached earlier.
Classification of MOSFET
MOSFET stands for metal oxide semiconductor field effect transistor. There are two types of MOSFET
DEPLETION TYPE MOSFET
Symbol of n-channel depletion type MOSFET
It consists of a highly doped p-type substrate into which two blocks of heavily doped n-type material are diffused to form a source and drain. A n-channel is formed by diffusing between source and drain. A thin layer of SiO2 is grown over the entire surface
and holes are cut in SiO2 to make contact with n-type blocks. The gate is also connected to a metal contact surface but remains insulated from the n-channel by the SiO2 layer. SiO2 layer results in an extremely high input impedance of the order of 1010 to 1015 for this years
fig. 4: Structure of n-channel depletion type MOSFET
When VGS 0V and VDS is applied and current flows from drain to source similar to JFET. When VGS 1V , the negative potential will tend to pressure electrons towards
the p-type substrate and attracts hole from p-type substrate. Therefore recombination occurs and will reduce the number of free electrons in the n-channel for conduction. Therefore with increased negative gate voltage ID reduces.
For positive values,Vgs , additional electrons from p-substrate will flow into the
channel and establish new carriers which will result in an increase in drain current with positive gate voltage.