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Physics Exam  >  Physics Notes  >  Physics for IIT JAM, UGC - NET, CSIR NET  >  Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET PDF Download

  • In 1945, Shockley had an idea for making a solid state device out of semiconductors.
  • He reasoned that a strong electrical field could cause the flow of electricity within a nearby semiconductor.
  • He tried to build one, but it didn't work.
  • Three years later, Brattain & Bardeen built the first working transistor, the germanium point-contact transistor, which was designed as the junction (sandwich) transistor.
  • In 1960 Bell scientist John Atalla developed a new design based on Shockley's original field-effect theories.
  • By the late 1960s, manufacturers converted from junction type integrated circuits to field effect devices. 
  • Field effect devices are those in which current is controlled by the action of an electron field, rather than carrier injection.
  • Field-effect transistors are so named because a weak electrical signal coming in through one electrode creates an electrical field through the rest of the transistor.
  • The FET was known as a “unipolar” transistor.
  • The term refers to the fact that current is transported by carriers of one polarity (majority), whereas in the conventional bipolar transistor carriers of both polarities (majority and minority) are involved.

The family of FET devices may be divided into : 

  • Junction FET
  • Depletion Mode MOSFET
  • Enhancement Mode MOSFET
     

Junction  FETs  (JFETs)

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  •  JFETs consists of a piece of high-resistivity semiconductor material (usually Si) which constitutes a channel for the majority carrier flow.
  • Conducting semiconductor channel between two ohmic contacts – source & drain

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET  Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  • The magnitude of this current is controlled by a voltage applied to a gate, which is a reverse-biased.
  • The fundamental difference between JFET and BJT devices: when the JFET junction is reverse-biased the gate current is practically zero, whereas the base current of the BJT is always some value greater than zero.


Junction  FETs

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  • JFET is a high-input resistance device, while the BJT is comparatively low.
  • If the channel is doped with a donor impurity, n-type material is formed and the channel current will consist of electrons.
  • If the channel is doped with an acceptor impurity, p-type material will be formed and the channel current will consist of holes.
  • N-channel devices have greater conductivity than pchannel types, since electrons have higher mobility than do holes; thus n-channel JFETs are approximately twice as efficient conductors compared to their p-channel counterparts.


Basic Structure of  FETs

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  • In addition to the channel, a JFET contains two ohmic contacts: the source and the drain.
  • The JFET will conduct current equally well in either direction and the source and drain leads are usually interchangeable.

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET    Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

 

N - Channel JFET 

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  • This transistor is made by forming a channel of N-type material in a P-type substrate.
  • Three wires are then connected to the device.
  • One at each end of the channel.
  • One connected to the substrate.
  • In a sense, the device is a bit like a PN-junction diode, except that there are two wires connected to the Ntype side.

 

How JFET  Function

  • The gate is connected to the source.
  • Since the pn junction is reversebiased, little current will flow in the gate connection.
  • The potential gradient established will form a depletion layer, where almost all the electrons present in the n-type channel will be swept away.
  • The most depleted portion is in the high field between the G and the D, and the leastdepleted area is between the G and the S. 

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  • Because the flow of current along the channel from the (+ve) drain to the (-ve) source is really a flow of free electrons from S to D in the n-type Si, the magnitude of this current will fall as more Si becomes depleted of free electrons.
  • There is a limit to the drain current (ID) which increased VDS can drive through the channel.
  • This limiting current is known as IDSS (Drain-to-Source current with the gate shorted to the source). 

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  • The output characteristics of an n-channel JFET with the gate short-circuited to the source.
  • The initial rise in ID is related to the buildup of the depletion layer as VDS increases.
  • The curve approaches the level of the limiting current IDSS when ID begins to be pinched off.
  • The physical meaning of this term leads to one definition of pinch-off voltage, VP , which is the value of VDS at which the maximum IDSS flows.

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  • With a steady gate-source voltage of 1 V there is always 1 V across the wall of the channel at the source end.
  • A drain-source voltage of 1 V means that there will be 2 V across the wall at the drain end. (The drain is ‘up’ 1V from the source potential and the gate is 1V ‘down’, hence the total difference is 2V.)
  • The higher voltage difference at the drain end means that the electron channel is squeezed down a bit more at this end. 

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  •  When the drain-source voltage is increased to 10V the voltage across the channel walls at the drain end increases to 11V, but remains just 1V at the source end.
  • The field across the walls near the drain end is now a lot larger than at the source end.
  • As a result the channel near the drain is squeezed down quite a lot.

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  •  Increasing the source-drain voltage to 20V squeezes down this end of the channel still more.
  • As we increase this voltage we increase the electric field which drives electrons along the open part of the channel.
  • However, also squeezes down the channel near the drain end. l This reduction in the open channel width makes it harder for electrons to pass.
  • As a result the drain-source current tends to remain constant when we increase the drain-source voltage.

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  •  Increasing VDS increases the widths of depletion layers, which penetrate more into channel and hence result in more channel narrowing toward the drain.
  • The resistance of the n-channel, RAB therefore increases with VDS. 
  • The drain current:  IDS = VDS/RAB
  • ID versus VDS exhibits a sublinear behavior, see figure for VDS < 5V.
  • The pinch-off voltage, VP is the magnitude of reverse bias needed across the p+n junction to make them just touch at the drain end.
  • Since actual bias voltage across p+n junction at drain end is VGD, the pinch-off occur whenever: VGD = -VP.

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Typical ID vs VDs characteristics of a JFET for various fixed gate voltages VGS.

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  •  Beyond VDS = VP, there is a short pinch-off channel of length, ℓpo.
  • As VDS increases, most of additional voltage simply drops across ℓpo as this region is depleted of carriers and hence highly resistive.
  • Voltage drop across channel length, Lch remain as VP.
  • Beyond pinch-off then   ID = VP/RAP (VDS>VP).

 

  • What happen when negative voltage, says VGS = -2V, is applied to gate with respect to source (with VDS=0).
  • The p+n junction are now reverse biased from the start, the channel is narrower, and channel resistance is now larger than in the VGS = 0 case.

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  • The drain current that flows when a small VDS applied (Fig b) is now smaller than in VGS= 0 case.
  • Applied VDS= 3 V to pinch-off the channel (Fig c).
  • When VDS= 3V, VGD across p+n junction at drain end is -5V, which is –VP, so channel becomes pinch-off.
  • Beyond pinch-off, ID is nearly saturated just as in the VGS=0 case.
  • Pinch-off occurs at VDS= VDS(sat),  VDS(sat)= VP+VGS, where VGS is –ve voltage (reducing VP).
  • For VDS>VDS(sat), ID becomes nearly saturated at value as IDS.
  • Beyond pinch-of, with –ve VGS, IDS is

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  • Where RAP(VGS) is the effective resistance of the conducting n-channel from A to P, which depends on channel thickness and hence VGS.
  • When VGS= -VP= -5V with VDS= 0, the two depletion layers touch over the entire channel length and the whole channel is closed.
  • The channel said to be off.

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET
Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NETJunction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

 

  • There is a convenient relationship between IDS and VGS.
  • Beyond pinch-off 

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  • Where IDSS is drain current when VGS= 0 and VGS(off) is defined as –VP, that is gate-source voltage that just pinches off the channel.
  • The pinch off voltage VP here is a +ve quantity because it was introduced through VDS(sat).
  • VGS(off) however is negative, -VP.

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET   Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

 

I-V characteristics

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

 

JFET: I-V characteristics

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET  Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

 

The transconductance curve

  • The process for plotting transconductance curve for a given JFET:
  • Plot a point that corresponds to value of VGS(off).
  • Plot a poit that corresponds to value of IDSS.
  • Select 3 or more values of VGS between 0 V and VGS(off). For value of VGS, determine the corresponding value of ID from

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

  • Plot the point from (3) and connect all the plotted point with a smooth curve.

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

JFET drain curves

 

JFET Biasing  Circuits

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

 

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

 

 

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

 

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

 

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET 

The method used to plot the dc bias line for the voltage-divider bias is as follows:

1. Plot the transconductance curve for the specific JFET.

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

5.  Plot ID found in (4) on the y-axis.

6. Extend the line to intersect the transconductance curve to obtain the Q- pomt values.

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

 

Example: Plot the dc bias line for the voltagedrivers biasing circuit

Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences | Physics for IIT JAM, UGC - NET, CSIR NET

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FAQs on Junction Field Effect Transistor - Semiconductor Devices, CSIR-NET Physical Sciences - Physics for IIT JAM, UGC - NET, CSIR NET

1. What is a junction field effect transistor (JFET)?
Ans. A junction field effect transistor (JFET) is a three-terminal semiconductor device that operates on the principle of controlling the flow of current using an electric field created by a voltage applied across the device. It is commonly used in amplifiers and switching circuits.
2. How does a JFET work?
Ans. A JFET consists of a channel made of semiconductor material and two regions, called the p-n junctions, on either side of the channel. When a voltage is applied across the p-n junctions, a depletion region is formed in the channel. By applying a control voltage to the gate terminal, the width of the depletion region is controlled, which in turn controls the flow of current through the channel.
3. What are the advantages of using JFETs?
Ans. JFETs have several advantages, such as low noise, high input impedance, and low power consumption. They also have a wide bandwidth, making them suitable for high-frequency applications. Additionally, JFETs can operate at high temperatures and have a simple structure, making them easy to manufacture.
4. What are the different types of JFETs?
Ans. There are two main types of JFETs: the n-channel JFET and the p-channel JFET. The n-channel JFET has an n-type channel and two p-type regions, while the p-channel JFET has a p-type channel and two n-type regions. The choice of type depends on the desired polarity of the voltage applied to the terminals.
5. How is a JFET different from a bipolar junction transistor (BJT)?
Ans. A JFET and a BJT are both types of transistors, but they operate on different principles. While a JFET controls current using an electric field, a BJT controls current using both charge carriers (electrons and holes). JFETs have higher input impedance, lower power consumption, and lower noise compared to BJTs, but BJTs have higher gain and faster switching speeds. The choice between the two depends on the specific application requirements.
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