All questions of Digital Logic for Computer Science Engineering (CSE) Exam
| 1 Crore+ students have signed up on EduRev. Have you? Download the App |
An n stage ripple counter can count up to- a)2n
- b)2n - 1
- c)n
- d)2n-1
Correct answer is option 'B'. Can you explain this answer?
An n stage ripple counter can count up to
a)
2n
b)
2n - 1
c)
n
d)
2n-1
|
Sanvi Kapoor answered |
An n stage ripple counter can count up to the binary value represented by the n-bits.
= 2n - 1
= 2n - 1
The next state table of a 2-bit saturating up-counter is given below.
The counter is built as a synchronous sequential circuit using T flip-flops. The expressions for 
are- a)
- b)
- c)
- d)
Correct answer is option 'B'. Can you explain this answer?
The next state table of a 2-bit saturating up-counter is given below.
The counter is built as a synchronous sequential circuit using T flip-flops. The expressions for are
area)
b)
c)
d)
|
Yash Patel answered |
By using above excitation table, T1=q1'q0,
T2=(q1q0)'=q1'+q0'
What is the result of evaluating the following two expressions using three-digit floating point arithmetic with rounding?(113. + -111.) + 7.51
113. + (-111. + 7.51)- a)9.51 and 10.0 respectively
- b)10.0 and 9.51 respectively
- c)9.51 and 9.51 respectively
- d)10.0 and 10.0 respectively
Correct answer is option 'D'. Can you explain this answer?
What is the result of evaluating the following two expressions using three-digit floating point arithmetic with rounding?
(113. + -111.) + 7.51
113. + (-111. + 7.51)
113. + (-111. + 7.51)
a)
9.51 and 10.0 respectively
b)
10.0 and 9.51 respectively
c)
9.51 and 9.51 respectively
d)
10.0 and 10.0 respectively
|
Aditya Deshmukh answered |
The correct answer is a.
(113. + -111.) + 7.51
= 2 + 7.51
= 9.51
113. + (-111. + 7.51)
= 113. + (-111. + 7.51)
= 113. - 103. = 10 [103.49 is rounded to 103.0]
The addition of 4-bit, two's complement, binary numbers 1101 and 0100 results in- a)0001 and an overflow
- b)1001 and no overflow
- c)0001 and no overflow
- d)1001 and an overflow
Correct answer is option 'C'. Can you explain this answer?
The addition of 4-bit, two's complement, binary numbers 1101 and 0100 results in
a)
0001 and an overflow
b)
1001 and no overflow
c)
0001 and no overflow
d)
1001 and an overflow
|
Rahul Chatterjee answered |
The addition results in 0001 and no overflow with 1 as carry bit.
In 2's complement addition Overflow happens only when :
- Sign bit of two input numbers is 0, and the result has sign bit 1.
- Sign bit of two input numbers is 1, and the result has sign bit 0.
The
16 -bit
2` s complement representation of an integer is
1111 1111 1111 0101 ; its decimal representation is ______________.
Correct answer is '-11'. Can you explain this answer?
The
16 -bit
2` s complement representation of an integer is
1111 1111 1111 0101 ; its decimal representation is ______________.
16 -bit
2` s complement representation of an integer is
1111 1111 1111 0101 ; its decimal representation is ______________.
|
Shreya Sen answered |
for 2's complement 1 111 1111 1111 0101 →2′scomplement→2′scomplement 1 000 0000 0000 1011
1st bit is same not involved in 2's complement same with 1's complement. since msb bit for sign.
Take one's complement and add 1 we get 11, and as it is negative number we get answer as -11
1st bit is same not involved in 2's complement same with 1's complement. since msb bit for sign.
Take one's complement and add 1 we get 11, and as it is negative number we get answer as -11
Find the maximum clock frequency at which the counter in the figure below can be operated. Assume that the propagation delay through each flip flop and each AND gate is 10 ns. Also assume that the setup time for the J K inputs of the flip flops is negligible.
Correct answer is '50'. Can you explain this answer?
Find the maximum clock frequency at which the counter in the figure below can be operated. Assume that the propagation delay through each flip flop and each AND gate is 10 ns. Also assume that the setup time for the J K inputs of the flip flops is negligible.
|
|
Yash Patel answered |
In a JK flip flop the output toggles when both J and K inputs are 1. So, we must ensure that with each clock the output from the previous stage reaches the current stage. From the figure, there is an AND gate between each stage and 
(10ns for output to reach the gate and 10ns for the output of AND gate to reach the next flipflop) isneeded for the output to reach the next stage. So, minimum time period needed for clock is 20ns which would mean a maximum clock frequency of 
(10ns for output to reach the gate and 10ns for the output of AND gate to reach the next flipflop) isneeded for the output to reach the next stage. So, minimum time period needed for clock is 20ns which would mean a maximum clock frequency of The number of full and half-adders required to add 16-bit numbers is- a)8 half-adders, 8 full-adders
- b)1 half-adder, 15 full-adders
- c)16 half-adders, 0 full-adders
- d)4 half-adders, 12 full-adders
Correct answer is option 'B'. Can you explain this answer?
The number of full and half-adders required to add 16-bit numbers is
a)
8 half-adders, 8 full-adders
b)
1 half-adder, 15 full-adders
c)
16 half-adders, 0 full-adders
d)
4 half-adders, 12 full-adders
|
|
Pranab Yadav answered |
for LSB addition we do not need a full adder for addition of subsequent bits we need full adders since carry from previous addition has to be fed into the addition operation
The total number of Boolean functions which can be realised with four variables is:- a)4
- b)17
- c)256
- d)65,536
Correct answer is option 'D'. Can you explain this answer?
The total number of Boolean functions which can be realised with four variables is:
a)
4
b)
17
c)
256
d)
65,536
|
Rhea Reddy answered |
A Boolean function of 4 variables is a function from a set 24 = 16 of elements (all combinations of 4 variables) to a set of 2 
elements. So, number of such functions will be 216 = 65,536
elements. So, number of such functions will be 216 = 65,536The dual of a Boolean function
written as 
is the same expression as that of F with + and swapped. F is said to be self-dual if 
. The number of self-dual functions with Boolean variables is- a)
- b)
- c)
- d)
Correct answer is option 'D'. Can you explain this answer?
The dual of a Boolean function written as is the same expression as that of F with + and swapped. F is said to be self-dual if . The number of self-dual functions with Boolean variables is
written as is the same expression as that of F with + and swapped. F is said to be self-dual if . The number of self-dual functions with Boolean variables isa)
b)
c)
d)
|
|
Ravi Singh answered |
A function is self dual if it is equal to its dual (A dual function is obtained by interchanging. and +).
For self-dual functions,
1. Number of min terms equals number of max terms
2. Function should not contain two complementary minterms - whose sum equals 2n - 1, where n is the number of variables.
so here (0,7) (1,6) (2,5) (3,4) are complementary terms so in self-dual we can select any one of them but not both.
possibility because say from 
we can pick anyone in minterm but not both.
NOTE:here i have taken only one of the complementary term for min term from the sets.
so remaining numbers will go to MAXTERMS
For above example, 24 = 16 self dual functions are possible
so if we have N variables, total Minterms possible is 2n
then half of them we selected so.
and now we have 2 choices for every pair for being selected.
so total such choices
For self-dual functions,
1. Number of min terms equals number of max terms
2. Function should not contain two complementary minterms - whose sum equals 2n - 1, where n is the number of variables.
so here (0,7) (1,6) (2,5) (3,4) are complementary terms so in self-dual we can select any one of them but not both.
possibility because say from we can pick anyone in minterm but not both.NOTE:here i have taken only one of the complementary term for min term from the sets.
so remaining numbers will go to MAXTERMS
For above example, 24 = 16 self dual functions are possible
so if we have N variables, total Minterms possible is 2n
then half of them we selected so
.and now we have 2 choices for every pair for being selected.
so total such choices
A ROM is used to store the Truth table for a binary multiple unit that will multiply two 4-bit numbers. The size of the ROM 
that is required to accommodate the Truth table is 
. Write the values of M and N.
Correct answer is '8'. Can you explain this answer?
A ROM is used to store the Truth table for a binary multiple unit that will multiply two 4-bit numbers. The size of the ROM that is required to accommodate the Truth table is . Write the values of M and N.
that is required to accommodate the Truth table is . Write the values of M and N.|
|
Ravi Singh answered |
A is 4 bit binary no A4A3A2A1
B is 4 bit binary no B4B3B2B1
M is result of multiplication M8M7M6M5M4M3M2M1 [check biggest no 1111 x 1111 =11100001]
So 4 bit of A 4 bit of B
input will consist of 8 bit need address 00000000 to 11111111 = 28 address
output will be of 8 bits
so memory will be of
M = 256 , N = 8
B is 4 bit binary no B4B3B2B1
M is result of multiplication M8M7M6M5M4M3M2M1 [check biggest no 1111 x 1111 =11100001]
So 4 bit of A 4 bit of B
input will consist of 8 bit need address 00000000 to 11111111 = 28 address
output will be of 8 bits
so memory will be of
M = 256 , N = 8
Which of the following input sequences for a cross-coupled R-S flip-flop realized with two NAND gates may lead to an oscillation?- a)11, 00
- b)01, 10
- c)10, 01
- d)00, 11
Correct answer is option 'D'. Can you explain this answer?
Which of the following input sequences for a cross-coupled R-S flip-flop realized with two NAND gates may lead to an oscillation?
a)
11, 00
b)
01, 10
c)
10, 01
d)
00, 11
|
|
Yash Patel answered |
For R-S flip flop with NAND gates (inputs are active low) 11-no change 00-indeterminate..............so option A may make the system oscillate as "00" is the final input. In option D, after "00" flipflop output may oscillate but after "11", it will be stabilized.
Let X and Y be the input and Z be the output of a AND gate. The value of Z is given by
- a)X + Y
- b)
- c)X - Y
- d)
Correct answer is option 'B'. Can you explain this answer?
Let X and Y be the input and Z be the output of a AND gate. The value of Z is given by
a)
X + Y
b)
c)
X - Y
d)
|
|
Ananya Kumari answered |
Let x and y be the input and z be the output of a and gate . the value of z is given by
x and y is integers they did negative sign
x- y
x and y is integers they did negative sign
x- y
Consider an eight-bit ripple-carry adder for computing the sum of A and B, where A and B are integers represented in 's complement form. If the decimal value of A is one, the decimal value of B that leads to the longest latency for the sum to stabilize is ___________- a)-1
- b)2
- c) 1
- d) -2
Correct answer is option 'A'. Can you explain this answer?
Consider an eight-bit ripple-carry adder for computing the sum of A and B, where A and B are integers represented in 's complement form. If the decimal value of A is one, the decimal value of B that leads to the longest latency for the sum to stabilize is ___________
a)
-1
b)
2
c)
1
d)
-2
|
Neha Choudhury answered |
Here "longest latency for the sum to stabilize" means maximum delay that ripple carry adder would take to add A and B, we are given value of A and need to find the value of B.
The Delay in Ripple Carry Adder is as follows
- For sum there are 2 XOR gates.
- For carry there is 1 XOR,1 AND and 1 OR gate.
i.e total 3 gate delays in case of carry and 2 gate delays in sum.
If we do 2's complement of 1 in 8 bit we get "00000001".
same we do for each option
-1 : "11111111"
2 : "00000010"
1 : "00000001"
-2 : "11111110"
So in case of -1 the carry bit will change and thus it will take 1 extra gate delay, hence we could see that the maximum delay we could get when input at B will be -1, i.e. add “00000001” with “11111111” and would get Maximum delay.
The quantity 837 in excess-3 BCD code would be represented as- a)1001 0011 0111
- b)1000 0001 1001
- c)1011 0110 1010
- d)1000 0011 0111
Correct answer is option 'C'. Can you explain this answer?
The quantity 837 in excess-3 BCD code would be represented as
a)
1001 0011 0111
b)
1000 0001 1001
c)
1011 0110 1010
d)
1000 0011 0111
|
|
Avinash Sharma answered |
The quantity 837 is first converted to BCD representation then it is incremented by 3 bit by bit.
Choose the correct alternatives (more than one may be correct) and write the corresponding letters only: The operation which is commutative but not associative is:- a)AND
- b)OR
- c)EX-OR
- d)NAND
Correct answer is option 'D'. Can you explain this answer?
Choose the correct alternatives (more than one may be correct) and write the corresponding letters only: The operation which is commutative but not associative is:
a)
AND
b)
OR
c)
EX-OR
d)
NAND
|
Pathways Academy answered |
- Every logic gate follows Commutative law.
- AND, OR, Ex-OR, EX-NOR follows Associative law also. NAND, NOR doesn’t follow Associative law.
If 
are Boolean variables, then which one of the following is INCORRECT?- a)
- b)
- c)
- d)
Correct answer is option 'C'. Can you explain this answer?
If are Boolean variables, then which one of the following is INCORRECT?
are Boolean variables, then which one of the following is INCORRECT?a)
b)
c)
d)
|
|
Sanvi Kapoor answered |
Option C (wx'(y+xz')+w'.x')y = (wx'y+wx'xz'+w'x')y =
xx' = 0.
So
Wx'y+w'x'y = x'y(w+w') = x'y
xx' = 0.
So
Wx'y+w'x'y = x'y(w+w') = x'y
Consider the circuit-shown below. Each of the control inputs, C0 through C3, must be tied to a constant, either ‘0’ or '1'.
What are the values of C0 through C3 that would cause F to be the exclusive OR of A and B?- a)(1 ,0, 0 ,1 )
- b)( 0 ,1 ,1 ,1 )
- c)(0, 1,1,0)
- d)(1,1, 1,1)
Correct answer is option 'C'. Can you explain this answer?
Consider the circuit-shown below. Each of the control inputs, C0 through C3, must be tied to a constant, either ‘0’ or '1'.
What are the values of C0 through C3 that would cause F to be the exclusive OR of A and B?
What are the values of C0 through C3 that would cause F to be the exclusive OR of A and B?
a)
(1 ,0, 0 ,1 )
b)
( 0 ,1 ,1 ,1 )
c)
(0, 1,1,0)
d)
(1,1, 1,1)
|
|
Yash Patel answered |
The output of
Assuming all numbers are in 2’s complement representation, which of the following numbers is divisible by 11111011?- a)11100111
- b)11100100
- c)11010111
- d)11011011
Correct answer is option 'A'. Can you explain this answer?
Assuming all numbers are in 2’s complement representation, which of the following numbers is divisible by 11111011?
a)
11100111
b)
11100100
c)
11010111
d)
11011011
|
Manasa Dey answered |
MSB of 2's compliment number has a weight of - 2^(n-1).
(Trick: (from reversing sign extension) just skip all leading 1's from MSB expect but 1, and then calculate the value as normal signed binary rep. ) so by calculating, we get the given number is -5 in decimal. and options are
a. -25
b. -28
c. -41
d. -37
Therefore it is clear that - 25 is divisible by - 5. so we can say that (a.) is correct.
(Trick: (from reversing sign extension) just skip all leading 1's from MSB expect but 1, and then calculate the value as normal signed binary rep. ) so by calculating, we get the given number is -5 in decimal. and options are
a. -25
b. -28
c. -41
d. -37
Therefore it is clear that - 25 is divisible by - 5. so we can say that (a.) is correct.
Booth's coding in 8 bits for the decimal number -57 is- a)0-100+1000
- b)0-100+100-1
- c)0-1+100-10+1
- d)00-10+100-1
Correct answer is option 'B'. Can you explain this answer?
Booth's coding in 8 bits for the decimal number -57 is
a)
0-100+1000
b)
0-100+100-1
c)
0-1+100-10+1
d)
00-10+100-1
|
Kabir Verma answered |
There are 2 ways for answering This questions.
Way 1 -> Convert 57 to Binary & Get 2's complement. It is "11000111" & Attach one extra 0 to right of it
110001110
Way 1 -> Convert 57 to Binary & Get 2's complement. It is "11000111" & Attach one extra 0 to right of it
110001110
To calculate booth code subtract right digit from left digit in every consecutive 2 digits.
So 11-> 0 , 10 -> +1, .. finally 10 -> +1
So 11-> 0 , 10 -> +1, .. finally 10 -> +1
Simplify Y = AB’ + (A’ + B)C- a)AB’ + C
- b)AB + AC
- c)A’B + AC’
- d)AB + A
Correct answer is option 'A'. Can you explain this answer?
Simplify Y = AB’ + (A’ + B)C
a)
AB’ + C
b)
AB + AC
c)
A’B + AC’
d)
AB + A
|
|
Sanya Agarwal answered |
Y = AB’ + (A’ + B)C = AB’ + (A’ + B)C = AB’ + (AB’)’C = AB’ + C.
A multiplexer is also known as- a)Coder
- b)Decoder
- c)Data selector
- d)Multivibrator
Correct answer is option 'C'. Can you explain this answer?
A multiplexer is also known as
a)
Coder
b)
Decoder
c)
Data selector
d)
Multivibrator
|
|
Ravi Singh answered |
In electronics, a multiplexer (or mux; spelled sometimes as multiplexor), also known as a data selector, is a device that selects between several analog or digital input signals and forwards the selected input to a single output line.
Choose the correct alternatives (more than one may be correct) and write the corresponding letters only:All digital circuits can be realized using only- a)Ex-OR gates
- b)Multiplexers
- c)Half adders
- d)OR gates
Correct answer is option 'B,C'. Can you explain this answer?
Choose the correct alternatives (more than one may be correct) and write the corresponding letters only:
All digital circuits can be realized using only
a)
Ex-OR gates
b)
Multiplexers
c)
Half adders
d)
OR gates
|
Rutuja Deshpande answered |
NOR gate, NAND gate, Multiplexers and Half adders can also be used to realise all digital circuits.
The number (123456)8 is equivalent to- a)(A72E)16 and (22130232)4
- b)(A72E)16 and (22131122)4
- c)(A73E)16 and (22130232)4
- d)(A62E)16 and (22120232)4
Correct answer is option 'A'. Can you explain this answer?
The number (123456)8 is equivalent to
a)
(A72E)16 and (22130232)4
b)
(A72E)16 and (22131122)4
c)
(A73E)16 and (22130232)4
d)
(A62E)16 and (22120232)4
|
Hrishikesh Unni answered |
(123456)8 = (001 010 011 100 101 110)2 = (00 1010 0111 0010 1110)2 = (A72E)16
= (00 10 10 01 11 00 10 11 10)2 = (22130232)4
= (00 10 10 01 11 00 10 11 10)2 = (22130232)4
How many types of sequential circuits are?- a)4
- b)2
- c)3
- d)7
Correct answer is option 'B'. Can you explain this answer?
How many types of sequential circuits are?
a)
4
b)
2
c)
3
d)
7
|
Sagnik Singh answered |
There are two type of sequential circuits viz., (i) synchronous or clocked and (ii) asynchronous or unclocked. Synchronous Sequential Circuits are triggered in the presence of a clock signal, whereas, Asynchronous Sequential Circuits function in the absence of a clock signal.
Let X be the number of distinct 16-bit integers in 2`s complement representation. Let Y be the number of distinct -bit integers in sign magnitude representation Then X Y is______.
Correct answer is '1'. Can you explain this answer?
Let X be the number of distinct 16-bit integers in 2`s complement representation. Let Y be the number of distinct -bit integers in sign magnitude representation Then X Y is______.
|
Akshay Singh answered |
Number of distinct 16-bit integers in 2's complement representation (X)
To find the number of distinct 16-bit integers in 2's complement representation, we need to consider the range of values that can be represented using 16 bits in 2's complement.
Range of 2's complement representation
In 2's complement representation, the leftmost bit (MSB) is reserved for sign, and the remaining bits represent the magnitude of the number. The MSB is 0 for positive numbers and 1 for negative numbers.
For a 16-bit representation, the MSB can be either 0 or 1, giving us two possibilities. The remaining 15 bits can represent values from 0 to 2^15-1 (since the MSB is reserved for sign). Therefore, the total number of distinct 16-bit integers in 2's complement representation is:
X = 2 * 2^15 = 2^16
Number of distinct -bit integers in sign magnitude representation (Y)
To find the number of distinct -bit integers in sign magnitude representation, we need to consider the range of values that can be represented using -bit sign magnitude representation.
Range of sign magnitude representation
In sign magnitude representation, the leftmost bit (MSB) is reserved for sign, and the remaining bits represent the magnitude of the number. The MSB is 0 for positive numbers and 1 for negative numbers.
For an -bit representation, the MSB can be either 0 or 1, giving us two possibilities. The remaining bits can represent values from 0 to 2^(-1+2-1) (since the MSB is reserved for sign). Therefore, the total number of distinct -bit integers in sign magnitude representation is:
Y = 2 * 2^(-1+2-1) = 2^0 = 1
Conclusion: X Y = 2^16 * 1 = 2^16 = 1
The product of X and Y is 1, which means that the number of distinct 16-bit integers in 2's complement representation is equal to the number of distinct -bit integers in sign magnitude representation.
To find the number of distinct 16-bit integers in 2's complement representation, we need to consider the range of values that can be represented using 16 bits in 2's complement.
Range of 2's complement representation
In 2's complement representation, the leftmost bit (MSB) is reserved for sign, and the remaining bits represent the magnitude of the number. The MSB is 0 for positive numbers and 1 for negative numbers.
For a 16-bit representation, the MSB can be either 0 or 1, giving us two possibilities. The remaining 15 bits can represent values from 0 to 2^15-1 (since the MSB is reserved for sign). Therefore, the total number of distinct 16-bit integers in 2's complement representation is:
X = 2 * 2^15 = 2^16
Number of distinct -bit integers in sign magnitude representation (Y)
To find the number of distinct -bit integers in sign magnitude representation, we need to consider the range of values that can be represented using -bit sign magnitude representation.
Range of sign magnitude representation
In sign magnitude representation, the leftmost bit (MSB) is reserved for sign, and the remaining bits represent the magnitude of the number. The MSB is 0 for positive numbers and 1 for negative numbers.
For an -bit representation, the MSB can be either 0 or 1, giving us two possibilities. The remaining bits can represent values from 0 to 2^(-1+2-1) (since the MSB is reserved for sign). Therefore, the total number of distinct -bit integers in sign magnitude representation is:
Y = 2 * 2^(-1+2-1) = 2^0 = 1
Conclusion: X Y = 2^16 * 1 = 2^16 = 1
The product of X and Y is 1, which means that the number of distinct 16-bit integers in 2's complement representation is equal to the number of distinct -bit integers in sign magnitude representation.
‘n’ flip-flop will divid e the clock frequency by a factor of- a)n2
- b)n
- c)2n
- d)log(n)
Correct answer is option 'C'. Can you explain this answer?
‘n’ flip-flop will divid e the clock frequency by a factor of
a)
n2
b)
n
c)
2n
d)
log(n)
|
|
Tushar Unni answered |
n-fiip-flop divide the clock frequency by a factor of 2n.
Convert the following numbers in the given bases into their equivalents in the desired bases:
(110.101)2 = (x)10
Correct answer is '6.625'. Can you explain this answer?
Convert the following numbers in the given bases into their equivalents in the desired bases:
(110.101)2 = (x)10
(110.101)2 = (x)10
|
Shalini Rane answered |
Conversion of Binary to Decimal:
Binary number (110.101)2 can be converted to decimal as follows:
(110.101)2 = 1*(2^2) + 1*(2^1) + 0*(2^0) + 1*(2^-1) + 0*(2^-2) + 1*(2^-3)
= 4 + 2 + 0 + 0.5 + 0 + 0.125
= 6.625
Conversion of Decimal to Hexadecimal:
Decimal number (1118)10 can be converted to hexadecimal as follows:
Divide 111 by 16: Quotient = 6, Remainder = 15 (F)
Divide 6 by 16: Quotient = 0, Remainder = 6
Therefore, (1118)10 = (6F)H
Hence, the correct answer is '6F', which is equivalent to '4' in the desired base.
Binary number (110.101)2 can be converted to decimal as follows:
(110.101)2 = 1*(2^2) + 1*(2^1) + 0*(2^0) + 1*(2^-1) + 0*(2^-2) + 1*(2^-3)
= 4 + 2 + 0 + 0.5 + 0 + 0.125
= 6.625
Conversion of Decimal to Hexadecimal:
Decimal number (1118)10 can be converted to hexadecimal as follows:
Divide 111 by 16: Quotient = 6, Remainder = 15 (F)
Divide 6 by 16: Quotient = 0, Remainder = 6
Therefore, (1118)10 = (6F)H
Hence, the correct answer is '6F', which is equivalent to '4' in the desired base.
Which are the essential prime implicants of the following Boolean function?
- a)
- b)
- c)
- d)
Correct answer is option 'A'. Can you explain this answer?
Which are the essential prime implicants of the following Boolean function?
a)
b)
c)
d)
|
|
Aditya Deshmukh answered |
Essential prime implicants are prime implicants that cover an output of the function that no combination of other prime implicants is able to cover i.e., if we delete such elements then the property of group, quad, octet is destroyed.
By drawing k map and by putting c on left side and a, b on right side we can find that a’c and ac’ are essential prime implicants.
The octal representation of an integer is (342)8. If this were to be treated as an eight-bit integer in an 8085 based computer, its decimal equivalent is- a)226
- b)-98
- c)76
- d)-30
Correct answer is option 'D'. Can you explain this answer?
The octal representation of an integer is (342)8. If this were to be treated as an eight-bit integer in an 8085 based computer, its decimal equivalent is
a)
226
b)
-98
c)
76
d)
-30
|
|
Harshad Mukherjee answered |
If we treat this as an 8 bit integer, the first bit becomes sign bit and since it is "1", number is negative. Computer uses 2's complement representation for negative numbers and hence the decimal equivalent will be
What is the minimum number of gates required to implement the Boolean function (AB+C) if we have to use only 2-input NOR gates?- a)2
- b)3
- c)4
- d)5
Correct answer is option 'B'. Can you explain this answer?
What is the minimum number of gates required to implement the Boolean function (AB+C) if we have to use only 2-input NOR gates?
a)
2
b)
3
c)
4
d)
5
|
|
Rashi Chakraborty answered |
given boolean function is
f = AB + C
= (A+C) . (B +C)
=((A+C)' +(B+C)')'
f = AB + C
= (A+C) . (B +C)
=((A+C)' +(B+C)')'
therefore 3 NOR gate required .
The number 43 in 2's complement representation is- a)01010101
- b)11010101
- c)00101011
- d)10101011
Correct answer is option 'C'. Can you explain this answer?
The number 43 in 2's complement representation is
a)
01010101
b)
11010101
c)
00101011
d)
10101011
|
|
Aman Menon answered |
2's complement representation is not same as 2's complement of a number. In 2's complement representation positive integers are represented in its normal binary form while negative numbers are represented in its 2's complement form. So (c) is correct here.
The decimal value 0.25- a)s equivalent to the binary value 0.1
- b)is equivalent to the binary value 0.01
- c)is equivalent to the binary value 0.00111...
- d)cannot be represented precisely in binary
Correct answer is option 'B'. Can you explain this answer?
The decimal value 0.25
a)
s equivalent to the binary value 0.1
b)
is equivalent to the binary value 0.01
c)
is equivalent to the binary value 0.00111...
d)
cannot be represented precisely in binary
|
|
Shounak Sharma answered |
1st Multiplication Iteration Multiply 0.25 by 2
0.25 x 2 = 0.50(Product) Fractional part=0.50
Carry=0 (MSB)
2nd Multiplication Iteration
Multiply 0.50 by 2
0.50 x 2 = 1.00(Product) Fractional part = 1.00
Carry = 1(LSB)
The fractional part in the 2nd iteration becomes zero and hence we stop the multiplication iteration.
Carry from the 1st multiplication iteration becomes MSB and carry from 2nd iteration becomes LSB
So the Result is 0.01
0.25 x 2 = 0.50(Product) Fractional part=0.50
Carry=0 (MSB)
2nd Multiplication Iteration
Multiply 0.50 by 2
0.50 x 2 = 1.00(Product) Fractional part = 1.00
Carry = 1(LSB)
The fractional part in the 2nd iteration becomes zero and hence we stop the multiplication iteration.
Carry from the 1st multiplication iteration becomes MSB and carry from 2nd iteration becomes LSB
So the Result is 0.01
How many pulses are needed to change the contents of a 8-bit up counter from 10101100 to 00100111 (rightmost bit is the LSB)?- a)134
- b)133
- c)124
- d)123
Correct answer is option 'D'. Can you explain this answer?
How many pulses are needed to change the contents of a 8-bit up counter from 10101100 to 00100111 (rightmost bit is the LSB)?
a)
134
b)
133
c)
124
d)
123
|
Gargi Sarkar answered |
As in a 28 Counter the range would be from 0-255. Hence to go from 10101100 (172) to 00100111 (39) , the counter has to go initially from 172 to 255 and then from 0 to 39.
Hence to go from 172 to 255, 255-172 = 83 Clock pulses would be required. then from 255 to 0 , again 1 clock pulse would be required.Then from 0 to 39 , 39 clock pulses would be required. Hence in total 83+1+39 =123 Clock pulses would be required.
Hence to go from 172 to 255, 255-172 = 83 Clock pulses would be required. then from 255 to 0 , again 1 clock pulse would be required.Then from 0 to 39 , 39 clock pulses would be required. Hence in total 83+1+39 =123 Clock pulses would be required.
The number of 1's in the binary representation of (3*4096 + 15*256 + 5*16 + 3) are:- a)8
- b)9
- c)10
- d)12
Correct answer is option 'C'. Can you explain this answer?
The number of 1's in the binary representation of (3*4096 + 15*256 + 5*16 + 3) are:
a)
8
b)
9
c)
10
d)
12
|
Bibek Chakraborty answered |
I suggest following approach , here we can clearly see that numbers are getting multiplied by powers of 16. So this is nothing but Hexadecimal number in disguise.
Using a 4-bit 2's complement arithmetic, which of the following additions will result in an overflow?
i. 1100 + 1100
ii. 0011 + 0111
iii. 1111 + 0111- a)i only
- b)ii only
- c)iii only
- d)i and iii only
Correct answer is option 'B'. Can you explain this answer?
Using a 4-bit 2's complement arithmetic, which of the following additions will result in an overflow?
i. 1100 + 1100
ii. 0011 + 0111
iii. 1111 + 0111
i. 1100 + 1100
ii. 0011 + 0111
iii. 1111 + 0111
a)
i only
b)
ii only
c)
iii only
d)
i and iii only
|
Sounak Joshi answered |
Only (ii) is the answer.
In 2's complement arithmetic, overflow happens only when
1. Sign bit of two input numbers is 0, and the result has sign bit 1
2. Sign bit of two input numbers is 1, and the result has sign bit 0.
Overflow is important only for signed arithmetic while carry is important only for unsigned arithmetic.
A carry happens when there is a carry to (or borrow from) the most significant bit. Here, (i) and (iii) cause a carry but only (ii) causes overflow.
In 2's complement arithmetic, overflow happens only when
1. Sign bit of two input numbers is 0, and the result has sign bit 1
2. Sign bit of two input numbers is 1, and the result has sign bit 0.
Overflow is important only for signed arithmetic while carry is important only for unsigned arithmetic.
A carry happens when there is a carry to (or borrow from) the most significant bit. Here, (i) and (iii) cause a carry but only (ii) causes overflow.
Consider the equation (43)x = (y3)8 where x and y are unknow. The number of possible solutions is _____
Correct answer is '5'. Can you explain this answer?
Consider the equation (43)x = (y3)8 where x and y are unknow. The number of possible solutions is _____
|
|
Gopal Das answered |
(43)x = (y3)8
Since a number in base -k can only have digits from 0 to (k-1), we can conclude that: x > 5 and y < 7
Now, the original equation, when converted to decimal base gives:
Now, the original equation, when converted to decimal base gives:
So, we have the following constraints:
The set of values of (x,y) that satisfy these constraints are:
I am counting 5 pairs of values.
The truth table
- a)X
- b)X + Y
- c)
- d)Y
Correct answer is 'A'. Can you explain this answer?
The truth table
a)
X
b)
X + Y
c)
d)
Y
|
Diya Dasgupta answered |
Whenever X is true (X,Y) is true and whenever X is false (X,Y) is false, so the answer is (A) X.
Which of the following expressions is not equivalent 
- a)
- b)
- c)
- d)
Correct answer is option 'D'. Can you explain this answer?
Which of the following expressions is not equivalent
a)
b)
c)
d)
|
Adhvaryu Parth answered |
Correct ans is d
use expression of nand and nor and put A and B as given in option and do bollean algebra u will get b as ans
use expression of nand and nor and put A and B as given in option and do bollean algebra u will get b as ans
The representation of the value of a 16 - bit unsigned integer X in hexadecimal number system is BC A9. The representation of the value of X in octal number system is- a)571244
- b)736251
- c)571247
- d)136251
Correct answer is option 'D'. Can you explain this answer?
The representation of the value of a 16 - bit unsigned integer X in hexadecimal number system is BC A9. The representation of the value of X in octal number system is
a)
571244
b)
736251
c)
571247
d)
136251
|
|
Subham Saha answered |
Representation of a 16-bit unsigned integer X in hexadecimal number system is BC A9. We need to find the representation of this value in the octal number system.
To convert a hexadecimal number to an octal number, we can follow these steps:
1. Convert the hexadecimal number to binary.
2. Group the binary digits into groups of three from right to left.
3. Convert each group of three binary digits to its octal equivalent.
4. Combine the octal digits to get the final octal representation.
Let's apply these steps to the given hexadecimal number BC A9:
1. Convert hexadecimal to binary:
BC = 1011 1100
A9 = 1010 1001
2. Group the binary digits into groups of three:
1011 1100 = 101 111 00
1010 1001 = 101 010 01
3. Convert each group of three binary digits to octal:
101 = 5
111 = 7
00 = 0
101 = 5
010 = 2
01 = 1
4. Combine the octal digits:
570251
Therefore, the representation of the value of X in the octal number system is 570251.
Now, let's check the options given:
a) 571244: This is not the correct answer as it does not match the calculated octal representation.
b) 736251: This is not the correct answer as it does not match the calculated octal representation.
c) 571247: This is not the correct answer as it does not match the calculated octal representation.
d) 136251: This is the correct answer as it matches the calculated octal representation.
Hence, the correct answer is option 'D' (136251).
To convert a hexadecimal number to an octal number, we can follow these steps:
1. Convert the hexadecimal number to binary.
2. Group the binary digits into groups of three from right to left.
3. Convert each group of three binary digits to its octal equivalent.
4. Combine the octal digits to get the final octal representation.
Let's apply these steps to the given hexadecimal number BC A9:
1. Convert hexadecimal to binary:
BC = 1011 1100
A9 = 1010 1001
2. Group the binary digits into groups of three:
1011 1100 = 101 111 00
1010 1001 = 101 010 01
3. Convert each group of three binary digits to octal:
101 = 5
111 = 7
00 = 0
101 = 5
010 = 2
01 = 1
4. Combine the octal digits:
570251
Therefore, the representation of the value of X in the octal number system is 570251.
Now, let's check the options given:
a) 571244: This is not the correct answer as it does not match the calculated octal representation.
b) 736251: This is not the correct answer as it does not match the calculated octal representation.
c) 571247: This is not the correct answer as it does not match the calculated octal representation.
d) 136251: This is the correct answer as it matches the calculated octal representation.
Hence, the correct answer is option 'D' (136251).
Register is a- a)Set of capacitor used to register input instructions in a digital computer.
- b)Set to paper tapes and cards put in a file.
- c)Temporary storage unit within the CPU having dedicated or general purpose use.
- d)Part of the auxiliary memory.
Correct answer is option 'C'. Can you explain this answer?
Register is a
a)
Set of capacitor used to register input instructions in a digital computer.
b)
Set to paper tapes and cards put in a file.
c)
Temporary storage unit within the CPU having dedicated or general purpose use.
d)
Part of the auxiliary memory.
|
|
Rounak Jain answered |
Register is consists of group of flip flop, with each flip-flop having 1 bit of information. Register acts as a temporary storage. Used for general purpose.
An N-bit carry lookahead adder, where N is a multiple of 4, employs ICs 74181 (4 bit ALU) and 74182 ( 4 bit carry lookahead generator).
The minimum addition time using the best architecture for this adder is- a)proportional to N
- b)proportional to log N
- c)a constant
- d)None of the above
Correct answer is option 'B'. Can you explain this answer?
An N-bit carry lookahead adder, where N is a multiple of 4, employs ICs 74181 (4 bit ALU) and 74182 ( 4 bit carry lookahead generator).
The minimum addition time using the best architecture for this adder is
The minimum addition time using the best architecture for this adder is
a)
proportional to N
b)
proportional to log N
c)
a constant
d)
None of the above
|
Ujwal Nambiar answered |
Explanation:
To understand why the minimum addition time of an N-bit carry lookahead adder is proportional to log N, let's first understand the working of a carry lookahead adder and its components.
Carry Lookahead Adder:
A carry lookahead adder is a type of adder that reduces the propagation delay associated with the carry propagation in a ripple carry adder. It uses a carry lookahead generator to calculate the carry signals for each bit position in parallel.
74181 4-bit ALU:
The 74181 is a 4-bit Arithmetic Logic Unit (ALU) integrated circuit (IC) that performs various arithmetic and logical operations on 4-bit inputs. It has multiple modes of operation, including addition, subtraction, logical AND, logical OR, etc.
74182 4-bit Carry Lookahead Generator:
The 74182 is a 4-bit Carry Lookahead Generator IC that generates the carry signals for each bit position of a 4-bit adder in parallel. It takes the input carry and the input signals and produces the carry signals for each bit position.
Minimum Addition Time:
The minimum addition time of an N-bit carry lookahead adder is the time required to perform the addition operation with the least possible delay.
Proportional to log N:
The minimum addition time of an N-bit carry lookahead adder is proportional to log N.
- As N is a multiple of 4, let's consider N = 4M, where M is an integer.
- The carry lookahead generator 74182 generates the carry signals for each bit position in parallel.
- The carry lookahead generator IC has a delay associated with it, which is logarithmic in nature.
- The delay of the carry lookahead generator increases logarithmically with the number of bits.
- As the number of bits increases, the delay increases logarithmically, resulting in a proportional relationship with log N.
Therefore, the minimum addition time of an N-bit carry lookahead adder is proportional to log N.
To understand why the minimum addition time of an N-bit carry lookahead adder is proportional to log N, let's first understand the working of a carry lookahead adder and its components.
Carry Lookahead Adder:
A carry lookahead adder is a type of adder that reduces the propagation delay associated with the carry propagation in a ripple carry adder. It uses a carry lookahead generator to calculate the carry signals for each bit position in parallel.
74181 4-bit ALU:
The 74181 is a 4-bit Arithmetic Logic Unit (ALU) integrated circuit (IC) that performs various arithmetic and logical operations on 4-bit inputs. It has multiple modes of operation, including addition, subtraction, logical AND, logical OR, etc.
74182 4-bit Carry Lookahead Generator:
The 74182 is a 4-bit Carry Lookahead Generator IC that generates the carry signals for each bit position of a 4-bit adder in parallel. It takes the input carry and the input signals and produces the carry signals for each bit position.
Minimum Addition Time:
The minimum addition time of an N-bit carry lookahead adder is the time required to perform the addition operation with the least possible delay.
Proportional to log N:
The minimum addition time of an N-bit carry lookahead adder is proportional to log N.
- As N is a multiple of 4, let's consider N = 4M, where M is an integer.
- The carry lookahead generator 74182 generates the carry signals for each bit position in parallel.
- The carry lookahead generator IC has a delay associated with it, which is logarithmic in nature.
- The delay of the carry lookahead generator increases logarithmically with the number of bits.
- As the number of bits increases, the delay increases logarithmically, resulting in a proportional relationship with log N.
Therefore, the minimum addition time of an N-bit carry lookahead adder is proportional to log N.
It is possible for an enable or strobe input to undergo an expansion of two or more MUX ICs to the digital multiplexer with the proficiency of large number of- a)Inputs
- b)Outputs
- c)Selection lines
- d)All of the Mentioned
Correct answer is option 'A'. Can you explain this answer?
It is possible for an enable or strobe input to undergo an expansion of two or more MUX ICs to the digital multiplexer with the proficiency of large number of
a)
Inputs
b)
Outputs
c)
Selection lines
d)
All of the Mentioned
|
Aaditya Ghosh answered |
It is possible for an enable or strobe input to undergo an expansion of two or more MUX ICs to the digital multiplexer with the proficiency of large number of inputs.
The smallest integer that can be represented by an 8-bit number in 2's complement form is- a)-256
- b)-128
- c)-127
- d)0
Correct answer is option 'B'. Can you explain this answer?
The smallest integer that can be represented by an 8-bit number in 2's complement form is
a)
-256
b)
-128
c)
-127
d)
0
|
|
Hrishikesh Unni answered |
Range of 2's compliment no = > (- 2n-1)to + (2n-1 - 1)
Here n = No of bits = 8.
So minimum no = -2 ^ 7 = (B) -128
Here n = No of bits = 8.
So minimum no = -2 ^ 7 = (B) -128
The simultaneous equations on the Boolean variables x, y, z and w,
have the following solution for x, y, z and w, respectively:- a)0 1 0 0
- b)1 1 0 1
- c)1 0 1 1
- d)1 0 0 0
Correct answer is option 'C'. Can you explain this answer?
The simultaneous equations on the Boolean variables x, y, z and w,
have the following solution for x, y, z and w, respectively:
a)
0 1 0 0
b)
1 1 0 1
c)
1 0 1 1
d)
1 0 0 0
|
|
Ravi Singh answered |
Statement 1 : x + y + z = 1
Till now, all the options are possible.
Till now, all the options are possible.Statement 2 : x y = 0
Since LHS ≠ 0, B is not possible.
Since LHS ≠ 0, B is not possible.Statement 3 : x z + w = 1
Since LHS ≠ 1, A and D are not possible.
Since LHS ≠ 1, A and D are not possible.Statement 4 : x y + z’ w’ = 0
Thus, C is the correct option.
Thus, C is the correct option.
Let an an-1 ... a1 a0 be the binary representation of an integer b. The integer b is divisible by 3 if- a)The number of one’s is divisible by 3
- b)The number of one’s divisible by 3, but bof by 9
- c)The number of zeroes is divisible 3
- d)The difference of alternate sum, i.e., (a0,+a2+...) - a1+a3+...) is divided by 3
Correct answer is option 'D'. Can you explain this answer?
Let an an-1 ... a1 a0 be the binary representation of an integer b. The integer b is divisible by 3 if
a)
The number of one’s is divisible by 3
b)
The number of one’s divisible by 3, but bof by 9
c)
The number of zeroes is divisible 3
d)
The difference of alternate sum, i.e., (a0,+a2+...) - a1+a3+...) is divided by 3
|
|
Saikat Basu answered |
Binary representation of 12 is 110 D
So, (q0 + q2)-{q1 + q3)
= (0 + 1)- ( 0 + 1)
= 1 - 1
= 0
0 is divisible by 3 so, true.
So, (q0 + q2)-{q1 + q3)
= (0 + 1)- ( 0 + 1)
= 1 - 1
= 0
0 is divisible by 3 so, true.
Chapter doubts & questions for Digital Logic - GATE Computer Science Engineering(CSE) 2025 Mock Test Series 2024 is part of Computer Science Engineering (CSE) exam preparation. The chapters have been prepared according to the Computer Science Engineering (CSE) exam syllabus. The Chapter doubts & questions, notes, tests & MCQs are made for Computer Science Engineering (CSE) 2024 Exam. Find important definitions, questions, notes, meanings, examples, exercises, MCQs and online tests here.
Chapter doubts & questions of Digital Logic - GATE Computer Science Engineering(CSE) 2025 Mock Test Series in English & Hindi are available as part of Computer Science Engineering (CSE) exam.
Download more important topics, notes, lectures and mock test series for Computer Science Engineering (CSE) Exam by signing up for free.
Signup to see your scores go up within 7 days!
Study with 1000+ FREE Docs, Videos & Tests
10M+ students study on EduRev
|
© EduRev
|
Education Revolution
|
Follow Us
|
Signup to see your scores
go up within 7 days!
Access 1000+ FREE Docs, Videos and Tests
Takes less than 10 seconds to signup