Delayed branching can help in the handling of control hazardsFor all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,a)The instruction following the conditional branch instruction in memory is executedb)The first instruction in the fall through path is executedc)The first instruction in the taken path is executedd)The branch takes longer to execute than any other instructionCorrect answer is option 'A'. Can you explain this answer? - EduRev Computer Science Engineering (CSE) Question

Explore Courses UPSC Exam UPSC Test Series Free Notes EduRev Infinity

Open App

Computer Science Engineering (CSE) Exam > Computer Science Engineering (CSE) Questions > Delayed branching can help in the handling of...

Join the Discussion on the App

Delayed branching can help in the handling of control hazardsFor all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,

a)
The instruction following the conditional branch instruction in memory is executed
b)
The first instruction in the fall through path is executed
c)
The first instruction in the taken path is executed
d)
The branch takes longer to execute than any other instruction

Correct answer is option 'A'. Can you explain this answer?

FREE This question is part of

Test: Pipelining- 1

Attempt Test

Attempt this Test

Verified Answer

Delayed branching can help in the handling of control hazardsFor all d...

76. Answer is A. In order to avoid the pipeline delay due to conditional branch instruction, a suitable instruction is placed
below the conditional branch instruction such that the instruction will be executed irrespective of whether branch is taken
or not and won't affect the program behaviour.
77. Answer is D) I4. The STORE instruction can be moved below the conditional branch instruction. Whether the branch is
taken or not, STORE will be executed as the next instruction after conditional branch instruction, due to delayed branching.
Here, I3 is not the answer because the branch conditional variable R1 is dependent on it. Same for I1. Similarly, I4 has a dependency on I2 and hence I2 must be executed before I4.

View all questions of this test

Most Upvoted Answer

Delayed branching can help in the handling of control hazardsFor all d...

Explanation:
Delayed branching is a technique used in computer architecture to handle control hazards. Control hazards occur when the control flow of a program is disrupted due to conditional branches or jumps. Delayed branching helps mitigate control hazards by allowing the instructions following a conditional branch to be executed before the branch condition is evaluated.

Delayed Conditional Branch Instructions:
In delayed branching, the branch instruction itself is not executed immediately. Instead, the instruction following the branch is executed first, regardless of whether the branch is taken or not. The branch instruction is then evaluated, and the appropriate path is taken.

Handling Control Hazards:
When a conditional branch instruction is encountered, the processor needs to determine whether the branch is taken or not. This determination is based on the condition specified in the branch instruction. In delayed branching, the condition is evaluated after the instruction following the branch is executed.

Options:
a) The instruction following the conditional branch instruction in memory is executed
b) The first instruction in the fall through path is executed
c) The first instruction in the taken path is executed
d) The branch takes longer to execute than any other instruction

Answer:
The correct answer is option 'A'. In delayed branching, the instruction following the conditional branch instruction in memory is executed. This is because the branch instruction itself is not executed immediately, and the instruction following it is executed first. The branch condition is evaluated later, and the appropriate path is taken.

Reasoning:
Delayed branching helps in handling control hazards by allowing the execution of instructions following a conditional branch before evaluating the branch condition. This reduces the impact of control hazards by keeping the pipeline filled with instructions and avoiding pipeline stalls. The instruction following the branch is executed irrespective of whether the branch is taken or not, ensuring continuous execution of instructions and improving performance.

Answered by Gate Gurus · View profile

Attention Computer Science Engineering (CSE) Students!

To make sure you are not studying endlessly, EduRev has designed Computer Science Engineering (CSE) study material, with Structured Courses, Videos, & Test Series. Plus get personalized analysis, doubt solving and improvement plans to achieve a great score in Computer Science Engineering (CSE).

GATE Computer Science Engineering(CSE) 2025 Mock Test Series

Question Bank for GATE Computer Science Engineering

General Aptitude for GATE

Computer Networks

View all answers Start learning for free

< Previous Question Next Question >

Explore Courses for Computer Science Engineering (CSE) exam

Similar Computer Science Engineering (CSE) Doubts

A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A programexecutes 109 instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is

View answer

An instruction pipeline has five stages, namely, instruction fetch (IF), instruction decode and register fetch (ID/RF), instruction execution (EX), memory access (MEM), and register writeback (WB) with stage latencies 1 ns, 2.2 ns, 2 ns, 1 ns, and 0.75 ns, respectively (ns stands for nanoseconds). To gain in terms of frequency, the designers have decided to split theID/RF stage into three stages (ID, RF1, RF2) each of latency 2.2/3 ns. Also, the EX stage is split into two stages (EX1, EX2) each of latency 1 ns. The new design has a total of eight pipeline stages. A program has 20% branch instructions which execute in the EX stage and produce the next instruction pointer at the end of the EX stage in the old design and at the end of the EX2 stage in the new design. The IF stage stalls after fetching a branch instruction until the next instruction pointer is computed. All instructions other than the branch instruction have an average CPI of one in both the designs. The execution times of this program on the old and the new design are P and Q nanoseconds, respectively. The value of P/Q is __________. Correct answer is '1.54'. Can you explain this answer?

View answer

Consider the following x86 machine instruction sequence:ADD EAX, EBXSUB ECX, EAXADD EBX, ECXThe first instruction adds the contents of the 32-bit registers EAX and EBX and stores the result in EAX. The second instruction subtracts the contents of EAX from ECX and stores the result in ECX. These instructions are to be executed in a pipelined instruction processor with the following 4 stages: fetch instruction (FI), decode instruction and calculate addresses (D

View answer

An instruction pipeline has 4 stages Instruction Fetch(IF), Instruction Decode(ID), Execute instruction (Ex), Write Back(WB). All instructions take all stages and takes 4 clock cycles. Branch instructions are not overlapped, i.e. the instructions after the branch are not fetched till branch is known. Branch is known in the execute phase. Suppose 20% instructions are conditional and 80 % unconditional. Calculate speed up for 100 instructions (upto 2 decimal plac e). Ignore the case that the branch may not be taken.

View answer

An instruction pipeline has five stages where each stage take 2 nanoseconds and all instruction use all five stages. Branch instructions are not overlapped. i.e., the instruction after the branch is not fetched till the branch instruction is completed. Under ideal conditions,a. Calculate the average instruction execution time assuming that 20% of all instructions executed are branch instruction. Ignore the fact that some branch instructions may be conditional.b. If a branch instruction is a conditional branch instruction, the branch need not be taken. If the branch is not taken, the following instructions can be overlapped. When 80% of all branch instructions are conditional branch instructions, and 50% of the conditional branch instructions are such that the branch is taken, calculate the average instruction execution time. Correct answer is 'Each stage is 2 ns.'. Can you explain this answer?

View answer

Top Courses for Computer Science Engineering (CSE)View all

GATE Computer Science Engineering(CSE) 2025 Mock Test Series

Question Bank for GATE Computer Science Engineering

General Aptitude for GATE

Computer Networks

Programming and Data Structures

Top Courses for Computer Science Engineering (CSE)

View all

Delayed branching can help in the handling of control hazardsFor all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,a)The instruction following the conditional branch instruction in memory is executedb)The first instruction in the fall through path is executedc)The first instruction in the taken path is executedd)The branch takes longer to execute than any other instructionCorrect answer is option 'A'. Can you explain this answer?

Share with a Friend

Answer this doubt

Question Description
Delayed branching can help in the handling of control hazardsFor all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,a)The instruction following the conditional branch instruction in memory is executedb)The first instruction in the fall through path is executedc)The first instruction in the taken path is executedd)The branch takes longer to execute than any other instructionCorrect answer is option 'A'. Can you explain this answer? for Computer Science Engineering (CSE) 2024 is part of Computer Science Engineering (CSE) preparation. The Question and answers have been prepared according to the Computer Science Engineering (CSE) exam syllabus. Information about Delayed branching can help in the handling of control hazardsFor all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,a)The instruction following the conditional branch instruction in memory is executedb)The first instruction in the fall through path is executedc)The first instruction in the taken path is executedd)The branch takes longer to execute than any other instructionCorrect answer is option 'A'. Can you explain this answer? covers all topics & solutions for Computer Science Engineering (CSE) 2024 Exam. Find important definitions, questions, meanings, examples, exercises and tests below for Delayed branching can help in the handling of control hazardsFor all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,a)The instruction following the conditional branch instruction in memory is executedb)The first instruction in the fall through path is executedc)The first instruction in the taken path is executedd)The branch takes longer to execute than any other instructionCorrect answer is option 'A'. Can you explain this answer?.

Solutions for Delayed branching can help in the handling of control hazardsFor all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,a)The instruction following the conditional branch instruction in memory is executedb)The first instruction in the fall through path is executedc)The first instruction in the taken path is executedd)The branch takes longer to execute than any other instructionCorrect answer is option 'A'. Can you explain this answer? in English & in Hindi are available as part of our courses for Computer Science Engineering (CSE). Download more important topics, notes, lectures and mock test series for Computer Science Engineering (CSE) Exam by signing up for free.

Here you can find the meaning of Delayed branching can help in the handling of control hazardsFor all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,a)The instruction following the conditional branch instruction in memory is executedb)The first instruction in the fall through path is executedc)The first instruction in the taken path is executedd)The branch takes longer to execute than any other instructionCorrect answer is option 'A'. Can you explain this answer? defined & explained in the simplest way possible. Besides giving the explanation of Delayed branching can help in the handling of control hazardsFor all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,a)The instruction following the conditional branch instruction in memory is executedb)The first instruction in the fall through path is executedc)The first instruction in the taken path is executedd)The branch takes longer to execute than any other instructionCorrect answer is option 'A'. Can you explain this answer?, a detailed solution for Delayed branching can help in the handling of control hazardsFor all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,a)The instruction following the conditional branch instruction in memory is executedb)The first instruction in the fall through path is executedc)The first instruction in the taken path is executedd)The branch takes longer to execute than any other instructionCorrect answer is option 'A'. Can you explain this answer? has been provided alongside types of Delayed branching can help in the handling of control hazardsFor all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,a)The instruction following the conditional branch instruction in memory is executedb)The first instruction in the fall through path is executedc)The first instruction in the taken path is executedd)The branch takes longer to execute than any other instructionCorrect answer is option 'A'. Can you explain this answer? theory, EduRev gives you an ample number of questions to practice Delayed branching can help in the handling of control hazardsFor all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,a)The instruction following the conditional branch instruction in memory is executedb)The first instruction in the fall through path is executedc)The first instruction in the taken path is executedd)The branch takes longer to execute than any other instructionCorrect answer is option 'A'. Can you explain this answer? tests, examples and also practice Computer Science Engineering (CSE) tests.

Explore Courses for Computer Science Engineering (CSE) exam