A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A programexecutes 109 instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is:a)1.0 secondb)1.2 secondsc)1.4 secondsd)1.6 secondsCorrect answer is option 'C'. Can you explain this answer? - EduRev Computer Science Engineering (CSE) Question

Explore Courses UPSC Exam UPSC Test Series Free Notes EduRev Infinity

Open App

Computer Science Engineering (CSE) Exam > Computer Science Engineering (CSE) Questions > A CPU has a five-stage pipeline and runs at 1...

Join the Discussion on the App

A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A program
executes 10⁹instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is:

a)
1.0 second
b)
1.2 seconds
c)
1.4 seconds
d)
1.6 seconds

Correct answer is option 'C'. Can you explain this answer?

FREE This question is part of

Test: Pipelining- 1

Attempt Test

Attempt this Test

Verified Answer

A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instructi...

Delay slots in pipeline caused due to a branch instruction is 2 as after the 3rd stage of current instruction (during 4th stage) IF of next begins. Ideally this should be during 2nd stage.
So, for total no. of instructions =10⁹and 20% branch, we have 0.2 x 2 x10⁹ = 4 x 10⁸ cycle penalty.
Since, clock speed is 1GHz and each instruction on average takes 1 cycle, total execution time in seconds will be

10⁹/10⁹+4x10⁸/10⁹ = 1.4

View all questions of this test

Most Upvoted Answer

A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instructi...

Given:
- The CPU has a five-stage pipeline.
- The CPU runs at a frequency of 1 GHz.
- Instruction fetch happens in the first stage of the pipeline.
- A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline.
- The processor stops fetching new instructions following a conditional branch until the branch outcome is known.
- The program executes 109 instructions, out of which 20% are conditional branches.
- Each instruction takes one cycle to complete on average.

To find:
The total execution time of the program.

Solution:
We can calculate the total execution time of the program using the concept of pipeline stalls caused by conditional branches.

Step 1: Calculate the number of conditional branch instructions in the program.
Total instructions = 109
Percentage of conditional branch instructions = 20%
Number of conditional branch instructions = 109 * 20% = 21.8 ≈ 22 (rounded to the nearest whole number)

Step 2: Calculate the number of pipeline stalls caused by conditional branches.
Since the branch outcome is known in the third stage of the pipeline, the pipeline stalls for two cycles to evaluate the condition and compute the target address.
Number of pipeline stalls caused by each conditional branch = 2
Total number of pipeline stalls caused by conditional branches = 22 * 2 = 44

Step 3: Calculate the total number of cycles required to execute the program.
Total instructions = 109
Number of instructions per cycle = 1
Number of pipeline stalls caused by conditional branches = 44
Total number of cycles required = Total instructions + Number of pipeline stalls caused by conditional branches = 109 + 44 = 153

Step 4: Calculate the total execution time of the program.
CPU frequency = 1 GHz = 10^9 cycles per second
Total number of cycles required = 153
Total execution time = Total number of cycles required / CPU frequency = 153 / 10^9 seconds = 0.000153 seconds

Answer:
The total execution time of the program is 0.000153 seconds, which is equivalent to 1.4 milliseconds. Therefore, the correct answer is option 'C' (1.4 seconds).

Answered by Gate Gurus · View profile

Attention Computer Science Engineering (CSE) Students!

To make sure you are not studying endlessly, EduRev has designed Computer Science Engineering (CSE) study material, with Structured Courses, Videos, & Test Series. Plus get personalized analysis, doubt solving and improvement plans to achieve a great score in Computer Science Engineering (CSE).

GATE Computer Science Engineering(CSE) 2025 Mock Test Series

Question Bank for GATE Computer Science Engineering

General Aptitude for GATE

Computer Networks

View all answers Start learning for free

< Previous Question Next Question >

Explore Courses for Computer Science Engineering (CSE) exam

Similar Computer Science Engineering (CSE) Doubts

An instruction pipeline has five stages, namely, instruction fetch (IF), instruction decode and register fetch (ID/RF), instruction execution (EX), memory access (MEM), and register writeback (WB) with stage latencies 1 ns, 2.2 ns, 2 ns, 1 ns, and 0.75 ns, respectively (ns stands for nanoseconds). To gain in terms of frequency, the designers have decided to split theID/RF stage into three stages (ID, RF1, RF2) each of latency 2.2/3 ns. Also, the EX stage is split into two stages (EX1, EX2) each of latency 1 ns. The new design has a total of eight pipeline stages. A program has 20% branch instructions which execute in the EX stage and produce the next instruction pointer at the end of the EX stage in the old design and at the end of the EX2 stage in the new design. The IF stage stalls after fetching a branch instruction until the next instruction pointer is computed. All instructions other than the branch instruction have an average CPI of one in both the designs. The execution times of this program on the old and the new design are P and Q nanoseconds, respectively. The value of P/Q is __________. Correct answer is '1.54'. Can you explain this answer?

View answer

An instruction pipeline has five stages where each stage take 2 nanoseconds and all instruction use all five stages. Branch instructions are not overlapped. i.e., the instruction after the branch is not fetched till the branch instruction is completed. Under ideal conditions,a. Calculate the average instruction execution time assuming that 20% of all instructions executed are branch instruction. Ignore the fact that some branch instructions may be conditional.b. If a branch instruction is a conditional branch instruction, the branch need not be taken. If the branch is not taken, the following instructions can be overlapped. When 80% of all branch instructions are conditional branch instructions, and 50% of the conditional branch instructions are such that the branch is taken, calculate the average instruction execution time. Correct answer is 'Each stage is 2 ns.'. Can you explain this answer?

View answer

Consider the following x86 machine instruction sequence:ADD EAX, EBXSUB ECX, EAXADD EBX, ECXThe first instruction adds the contents of the 32-bit registers EAX and EBX and stores the result in EAX. The second instruction subtracts the contents of EAX from ECX and stores the result in ECX. These instructions are to be executed in a pipelined instruction processor with the following 4 stages: fetch instruction (FI), decode instruction and calculate addresses (D

View answer

The instruction pipeline of a RISC processor has the following stages: Instruction Fetch (IF), Instruction Decode (ID), Operand Fetch (OF), Perform Operation (PO) and Writeback (WB). The IF, ID, OF and WB stages take 1 clock cycle each for every instruction. Consider a sequence of 100 instructions. In the PO stage, 40 instructions take 3 clock cycles each, 35 instructions take 2 clock cycles each, and the remaining 25 instructions take 1 clock cycle each. Assume that there are no data hazards and no control hazards.The number of clock cycles required for completion of execution of the sequence of instructions is ______.

View answer

The instruction pipeline of a RISC processor has the following stages: Instruction Fetch (IF), Instruction Decode (ID), Operand Fetch (OF), Perform Operation (PO) and Writeback (WB), The IF, ID, OF and WB stages take 1 clock cycle each for every instruction. Consider a sequence of 100 instructions. In the PO stage, 40 instructions take 3 clock cycles each, 35 instructions take 2 clock cycles each, and the remaining 25 instructions take 1 clock cycle each. Assume that there are no data hazards and no control hazards. The number of clock cycles required for completion of execution of the sequence of instruction is ______ .Note -This was Numerical Type question.

View answer

Top Courses for Computer Science Engineering (CSE)View all

GATE Computer Science Engineering(CSE) 2025 Mock Test Series

Question Bank for GATE Computer Science Engineering

General Aptitude for GATE

Computer Networks

Programming and Data Structures

Top Courses for Computer Science Engineering (CSE)

View all

A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A programexecutes 109 instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is:a)1.0 secondb)1.2 secondsc)1.4 secondsd)1.6 secondsCorrect answer is option 'C'. Can you explain this answer?

Share with a Friend

Answer this doubt

Question Description
A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A programexecutes 109 instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is:a)1.0 secondb)1.2 secondsc)1.4 secondsd)1.6 secondsCorrect answer is option 'C'. Can you explain this answer? for Computer Science Engineering (CSE) 2024 is part of Computer Science Engineering (CSE) preparation. The Question and answers have been prepared according to the Computer Science Engineering (CSE) exam syllabus. Information about A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A programexecutes 109 instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is:a)1.0 secondb)1.2 secondsc)1.4 secondsd)1.6 secondsCorrect answer is option 'C'. Can you explain this answer? covers all topics & solutions for Computer Science Engineering (CSE) 2024 Exam. Find important definitions, questions, meanings, examples, exercises and tests below for A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A programexecutes 109 instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is:a)1.0 secondb)1.2 secondsc)1.4 secondsd)1.6 secondsCorrect answer is option 'C'. Can you explain this answer?.

Solutions for A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A programexecutes 109 instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is:a)1.0 secondb)1.2 secondsc)1.4 secondsd)1.6 secondsCorrect answer is option 'C'. Can you explain this answer? in English & in Hindi are available as part of our courses for Computer Science Engineering (CSE). Download more important topics, notes, lectures and mock test series for Computer Science Engineering (CSE) Exam by signing up for free.

Here you can find the meaning of A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A programexecutes 109 instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is:a)1.0 secondb)1.2 secondsc)1.4 secondsd)1.6 secondsCorrect answer is option 'C'. Can you explain this answer? defined & explained in the simplest way possible. Besides giving the explanation of A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A programexecutes 109 instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is:a)1.0 secondb)1.2 secondsc)1.4 secondsd)1.6 secondsCorrect answer is option 'C'. Can you explain this answer?, a detailed solution for A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A programexecutes 109 instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is:a)1.0 secondb)1.2 secondsc)1.4 secondsd)1.6 secondsCorrect answer is option 'C'. Can you explain this answer? has been provided alongside types of A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A programexecutes 109 instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is:a)1.0 secondb)1.2 secondsc)1.4 secondsd)1.6 secondsCorrect answer is option 'C'. Can you explain this answer? theory, EduRev gives you an ample number of questions to practice A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the target address and evaluates the condition in the third stage of the pipeline. The processor stops fetching new instructions following a conditional branch until the branch outcome is known. A programexecutes 109 instructions out of which 20% are conditional branches. If each instruction takes one cycle to complete on average, the total execution time of the program is:a)1.0 secondb)1.2 secondsc)1.4 secondsd)1.6 secondsCorrect answer is option 'C'. Can you explain this answer? tests, examples and also practice Computer Science Engineering (CSE) tests.

Explore Courses for Computer Science Engineering (CSE) exam