The answer to the question is option 'A' i.e., parallel.

Parallel arrangement of chips means that multiple chips are connected in parallel to increase the data bus width. In this case, to obtain a 16-bit data bus width, two 4K*8 chips of RAM and ROM need to be arranged in parallel.

Here is a detailed explanation of why the answer is option 'A':

1. Data bus width:
The data bus width determines the number of bits that can be transferred simultaneously between the processor and memory. In this case, a 16-bit data bus width means that 16 bits of data can be transferred at a time.

2. 4K*8 chips:
A 4K*8 chip means that the chip has a capacity of 4K (4 kilobytes) and each location within the chip can store 8 bits of data. These chips can be used as RAM (Random Access Memory) and ROM (Read-Only Memory) for storing and accessing data.

3. Parallel arrangement:
To increase the data bus width to 16 bits, two 4K*8 chips need to be connected in parallel. This means that the data lines of both chips are connected together so that data can be transferred simultaneously through both chips.

4. Parallel connection of data lines:
By connecting the data lines of the two chips in parallel, the 16-bit data bus width can be achieved. The data from one chip will be transferred through one set of data lines, while the data from the other chip will be transferred through another set of data lines.

5. Benefits of parallel arrangement:
The parallel arrangement of chips offers several benefits:
- Increased data bus width: By connecting multiple chips in parallel, the data bus width can be increased, allowing for faster data transfer.
- Improved performance: With a wider data bus, more data can be transferred simultaneously, resulting in improved performance and speed.
- Higher capacity: By combining the capacity of multiple chips, the overall memory capacity can be increased.

6. Limitations of parallel arrangement:
While the parallel arrangement offers advantages, there are some limitations as well:
- Increased complexity: Connecting multiple chips in parallel requires additional circuitry and can increase the complexity of the system.
- Higher power consumption: With more chips connected in parallel, the power consumption of the system may increase.
- Increased cost: Using multiple chips in parallel can increase the cost of the system due to the need for additional components.

In conclusion, to obtain a 16-bit data bus width, the two 4K*8 chips of RAM and ROM need to be arranged in parallel. This allows for simultaneous transfer of data through both chips, resulting in increased data bus width and improved performance.