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Assertion (A): When Os and 1s are interchanged in the truth table, the positive logic AND gate becomes negative logic OR gate, and positive logic NAND gate becomes negative logic NOR gate.Reason (R): The simple method of converting the logic designation (i.e. from positive to negative logic or vice versa) is that all 0’s are replaced with 1s and all 1s with Os in the truth table.a)Both A and R are true and R is the correct explanation of A.b)Both A and R are true but R is not the correct explanation of A.c)A is true but R is false.d)A is false but R is true.Correct answer is option 'A'. Can you explain this answer? for Electrical Engineering (EE) 2024 is part of Electrical Engineering (EE) preparation. The Question and answers have been prepared
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the Electrical Engineering (EE) exam syllabus. Information about Assertion (A): When Os and 1s are interchanged in the truth table, the positive logic AND gate becomes negative logic OR gate, and positive logic NAND gate becomes negative logic NOR gate.Reason (R): The simple method of converting the logic designation (i.e. from positive to negative logic or vice versa) is that all 0’s are replaced with 1s and all 1s with Os in the truth table.a)Both A and R are true and R is the correct explanation of A.b)Both A and R are true but R is not the correct explanation of A.c)A is true but R is false.d)A is false but R is true.Correct answer is option 'A'. Can you explain this answer? covers all topics & solutions for Electrical Engineering (EE) 2024 Exam.
Find important definitions, questions, meanings, examples, exercises and tests below for Assertion (A): When Os and 1s are interchanged in the truth table, the positive logic AND gate becomes negative logic OR gate, and positive logic NAND gate becomes negative logic NOR gate.Reason (R): The simple method of converting the logic designation (i.e. from positive to negative logic or vice versa) is that all 0’s are replaced with 1s and all 1s with Os in the truth table.a)Both A and R are true and R is the correct explanation of A.b)Both A and R are true but R is not the correct explanation of A.c)A is true but R is false.d)A is false but R is true.Correct answer is option 'A'. Can you explain this answer?.
Solutions for Assertion (A): When Os and 1s are interchanged in the truth table, the positive logic AND gate becomes negative logic OR gate, and positive logic NAND gate becomes negative logic NOR gate.Reason (R): The simple method of converting the logic designation (i.e. from positive to negative logic or vice versa) is that all 0’s are replaced with 1s and all 1s with Os in the truth table.a)Both A and R are true and R is the correct explanation of A.b)Both A and R are true but R is not the correct explanation of A.c)A is true but R is false.d)A is false but R is true.Correct answer is option 'A'. Can you explain this answer? in English & in Hindi are available as part of our courses for Electrical Engineering (EE).
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Here you can find the meaning of Assertion (A): When Os and 1s are interchanged in the truth table, the positive logic AND gate becomes negative logic OR gate, and positive logic NAND gate becomes negative logic NOR gate.Reason (R): The simple method of converting the logic designation (i.e. from positive to negative logic or vice versa) is that all 0’s are replaced with 1s and all 1s with Os in the truth table.a)Both A and R are true and R is the correct explanation of A.b)Both A and R are true but R is not the correct explanation of A.c)A is true but R is false.d)A is false but R is true.Correct answer is option 'A'. Can you explain this answer? defined & explained in the simplest way possible. Besides giving the explanation of
Assertion (A): When Os and 1s are interchanged in the truth table, the positive logic AND gate becomes negative logic OR gate, and positive logic NAND gate becomes negative logic NOR gate.Reason (R): The simple method of converting the logic designation (i.e. from positive to negative logic or vice versa) is that all 0’s are replaced with 1s and all 1s with Os in the truth table.a)Both A and R are true and R is the correct explanation of A.b)Both A and R are true but R is not the correct explanation of A.c)A is true but R is false.d)A is false but R is true.Correct answer is option 'A'. Can you explain this answer?, a detailed solution for Assertion (A): When Os and 1s are interchanged in the truth table, the positive logic AND gate becomes negative logic OR gate, and positive logic NAND gate becomes negative logic NOR gate.Reason (R): The simple method of converting the logic designation (i.e. from positive to negative logic or vice versa) is that all 0’s are replaced with 1s and all 1s with Os in the truth table.a)Both A and R are true and R is the correct explanation of A.b)Both A and R are true but R is not the correct explanation of A.c)A is true but R is false.d)A is false but R is true.Correct answer is option 'A'. Can you explain this answer? has been provided alongside types of Assertion (A): When Os and 1s are interchanged in the truth table, the positive logic AND gate becomes negative logic OR gate, and positive logic NAND gate becomes negative logic NOR gate.Reason (R): The simple method of converting the logic designation (i.e. from positive to negative logic or vice versa) is that all 0’s are replaced with 1s and all 1s with Os in the truth table.a)Both A and R are true and R is the correct explanation of A.b)Both A and R are true but R is not the correct explanation of A.c)A is true but R is false.d)A is false but R is true.Correct answer is option 'A'. Can you explain this answer? theory, EduRev gives you an
ample number of questions to practice Assertion (A): When Os and 1s are interchanged in the truth table, the positive logic AND gate becomes negative logic OR gate, and positive logic NAND gate becomes negative logic NOR gate.Reason (R): The simple method of converting the logic designation (i.e. from positive to negative logic or vice versa) is that all 0’s are replaced with 1s and all 1s with Os in the truth table.a)Both A and R are true and R is the correct explanation of A.b)Both A and R are true but R is not the correct explanation of A.c)A is true but R is false.d)A is false but R is true.Correct answer is option 'A'. Can you explain this answer? tests, examples and also practice Electrical Engineering (EE) tests.