Electrical Engineering (EE) Exam > Electrical Engineering (EE) Questions > The number of two input NAND gate required to...
Start Learning for Free
The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectively
- a)2 and 5
- b)3 and 4
- c)3 and 5
- d)2 and 4
Correct answer is option 'C'. Can you explain this answer?
| FREE This question is part of | Download PDF Attempt this Test |
Verified Answer
The number of two input NAND gate required to implement an OR gate and...
OR gate using NAND gate:
EX-NOR gate using NAND gate:
Thus, we require 3 NAND gates for an OR gate while 5 NAND gates for an EX-NOR gate.
EX-NOR gate using NAND gate:
Thus, we require 3 NAND gates for an OR gate while 5 NAND gates for an EX-NOR gate.
Most Upvoted Answer
The number of two input NAND gate required to implement an OR gate and...
Explanation:
To implement an OR gate using NAND gates, we need to consider the truth table of an OR gate, which is as follows:
| A | B | Output |
|---|---|--------|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
From the truth table, we can see that the output of an OR gate is 0 only when both inputs are 0. In all other cases, the output is 1.
To implement this behavior using NAND gates, we can connect two NAND gates in series, with their inputs connected to the same signal. The output of the first NAND gate will be connected to both inputs of the second NAND gate. The resulting circuit will function as an OR gate.
Implementation of OR gate using NAND gates:
- Input A and B are connected to the inputs of two NAND gates.
- The outputs of both NAND gates are connected to the inputs of a third NAND gate.
- The output of the third NAND gate is the output of the OR gate.
Truth table for the implementation:
| A | B | NAND1 | NAND2 | Output |
|---|---|-------|-------|--------|
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
As we can see from the truth table, the implementation using three NAND gates behaves exactly like an OR gate.
Implementation of EX-NOR gate using NAND gates:
To implement an EX-NOR gate using NAND gates, we can use the following logic:
EX-NOR(A, B) = NAND(NAND(A, NAND(A, B)), NAND(B, NAND(A, B)))
- First, we NAND the inputs A and B together.
- Then, we NAND the result with A and B separately.
- Finally, we NAND the results of the previous step together.
Implementation of EX-NOR gate using NAND gates:
- Input A and B are connected to the inputs of a NAND gate.
- The output of the NAND gate is connected to one input of two separate NAND gates.
- Input A is connected to the other input of the first NAND gate.
- Input B is connected to the other input of the second NAND gate.
- The outputs of both NAND gates are connected to the inputs of a third NAND gate.
- The output of the third NAND gate is the output of the EX-NOR gate.
Truth table for the implementation:
| A | B | NAND1 | NAND2 | NAND3 | Output |
|---|---|-------|-------|-------|--------|
| 0 | 0 | 1 | 1 | 0 | 1 |
| 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 0
To implement an OR gate using NAND gates, we need to consider the truth table of an OR gate, which is as follows:
| A | B | Output |
|---|---|--------|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
From the truth table, we can see that the output of an OR gate is 0 only when both inputs are 0. In all other cases, the output is 1.
To implement this behavior using NAND gates, we can connect two NAND gates in series, with their inputs connected to the same signal. The output of the first NAND gate will be connected to both inputs of the second NAND gate. The resulting circuit will function as an OR gate.
Implementation of OR gate using NAND gates:
- Input A and B are connected to the inputs of two NAND gates.
- The outputs of both NAND gates are connected to the inputs of a third NAND gate.
- The output of the third NAND gate is the output of the OR gate.
Truth table for the implementation:
| A | B | NAND1 | NAND2 | Output |
|---|---|-------|-------|--------|
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
As we can see from the truth table, the implementation using three NAND gates behaves exactly like an OR gate.
Implementation of EX-NOR gate using NAND gates:
To implement an EX-NOR gate using NAND gates, we can use the following logic:
EX-NOR(A, B) = NAND(NAND(A, NAND(A, B)), NAND(B, NAND(A, B)))
- First, we NAND the inputs A and B together.
- Then, we NAND the result with A and B separately.
- Finally, we NAND the results of the previous step together.
Implementation of EX-NOR gate using NAND gates:
- Input A and B are connected to the inputs of a NAND gate.
- The output of the NAND gate is connected to one input of two separate NAND gates.
- Input A is connected to the other input of the first NAND gate.
- Input B is connected to the other input of the second NAND gate.
- The outputs of both NAND gates are connected to the inputs of a third NAND gate.
- The output of the third NAND gate is the output of the EX-NOR gate.
Truth table for the implementation:
| A | B | NAND1 | NAND2 | NAND3 | Output |
|---|---|-------|-------|-------|--------|
| 0 | 0 | 1 | 1 | 0 | 1 |
| 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 0
Attention Electrical Engineering (EE) Students!
To make sure you are not studying endlessly, EduRev has designed Electrical Engineering (EE) study material, with Structured Courses, Videos, & Test Series. Plus get personalized analysis, doubt solving and improvement plans to achieve a great score in Electrical Engineering (EE).
|
Explore Courses for Electrical Engineering (EE) exam
|
|
Similar Electrical Engineering (EE) Doubts
Top Courses for Electrical Engineering (EE)View all
The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer?
Question Description
The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer? for Electrical Engineering (EE) 2024 is part of Electrical Engineering (EE) preparation. The Question and answers have been prepared according to the Electrical Engineering (EE) exam syllabus. Information about The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer? covers all topics & solutions for Electrical Engineering (EE) 2024 Exam. Find important definitions, questions, meanings, examples, exercises and tests below for The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer?.
The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer? for Electrical Engineering (EE) 2024 is part of Electrical Engineering (EE) preparation. The Question and answers have been prepared according to the Electrical Engineering (EE) exam syllabus. Information about The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer? covers all topics & solutions for Electrical Engineering (EE) 2024 Exam. Find important definitions, questions, meanings, examples, exercises and tests below for The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer?.
Solutions for The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer? in English & in Hindi are available as part of our courses for Electrical Engineering (EE).
Download more important topics, notes, lectures and mock test series for Electrical Engineering (EE) Exam by signing up for free.
Here you can find the meaning of The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer? defined & explained in the simplest way possible. Besides giving the explanation of
The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer?, a detailed solution for The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer? has been provided alongside types of The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer? theory, EduRev gives you an
ample number of questions to practice The number of two input NAND gate required to implement an OR gate and an EX-NOR gate are respectivelya)2 and 5b)3 and 4c)3 and 5d)2 and 4Correct answer is option 'C'. Can you explain this answer? tests, examples and also practice Electrical Engineering (EE) tests.
|
|
Explore Courses for Electrical Engineering (EE) exam
|
|
Suggested Free Tests
Signup for Free!
Signup to see your scores go up within 7 days! Learn & Practice with 1000+ FREE Notes, Videos & Tests.
|
© EduRev
|
Education Revolution
|
Follow Us
|
Signup to see your scores
go up within 7 days!
Access 1000+ FREE Docs, Videos and Tests
Takes less than 10 seconds to signup