The control input (C) to the circuit in Fig.4.2.2 is fed directly to gate 1, but inverted to gate 2. This ensures that whatever the logic state of C, one gate is enabled, whilst the other is disabled.
Therefore when C = 1, NAND gate 1 will be enabled and its output will be the inverse of its data input (i.e.A), and because C (in this case logic 0) is applied to the control input of gate 2 its output will be logic 1.
Applying logic 0 to input C will cause gate 1 to be disabled, making its output logic 1, and gate 2 will be enabled making its output B.
Gate 3 will therefore always have one of its inputs held at logic 1, because either gate 1 or gate 2 is disabled, whilst the other input to gate 3 will be either A or B. Gate 3 output will be the inverse of this input, so the result at the output X will be either A or B depending on the state of the control line, as can be seen from Table 4.2.2.
Note that this arrangement of three NAND gates (or four if an additional NAND gate is used in place of the inverter) works just the same as having an inverter (NOT gate) select either of two AND gates whose outputs are combined by an OR gate (De Morgan’s theorem) but uses only one Quad 2-input gate IC instead of the three required by the NOT/AND/OR solution.
Having combined, or multiplexed two data sources into one output line, it will usually be necessary at some point to separate or de-multiplex the combined data into separate outputs once more. To do this for the circuit in Fig. 4.2.2, a circuit such as that shown in Fig 4.2.3 will be required.
Two connections from the data select circuit are required to connect the data to this simple de−multiplexer, one to connect the data from output X of the data select circuit in Fig. 4.2.2 to the combined A/B input of Fig.4.2.3 and another connection from C on Fig. 4.2.2 to C on Fig. 4.2.3 to share the control signal.
Having to use two connecting lines to connect the multiplexer to the de-multiplexer to carry two signals does not apparently justify using these two extra circuits, however the principle of multiplexing demonstrated in Figs. 4.2.2 and 4.2.3 can be extended to multiplex a greater number of data inputs, and the more lines that are multiplexed in this way, the more efficient the system becomes. Also there are additional ways to use these techniques other than transferring data from one place to another, as explained in Digital Electronics Module 4.4 (Encoders and Decoders).