PPT: Combinational Logic Notes | EduRev

 Page 1


Princess Sumaya Univ.
Computer Engineering Dept.
Page 2


Princess Sumaya Univ.
Computer Engineering Dept.
Princess Sumaya University Princess Sumaya University 4241 4241 – – Digital Logic Design Digital Logic Design Computer Engineering Dept. Computer Engineering Dept.
Combinational Circuits Combinational Circuits
«Output is function of input only
i.e. no feedback
When input changes, output may change (after a delay)
1 1 / 65 / 65






n inputs m outputs
Combinational
Circuits
û
Page 3


Princess Sumaya Univ.
Computer Engineering Dept.
Princess Sumaya University Princess Sumaya University 4241 4241 – – Digital Logic Design Digital Logic Design Computer Engineering Dept. Computer Engineering Dept.
Combinational Circuits Combinational Circuits
«Output is function of input only
i.e. no feedback
When input changes, output may change (after a delay)
1 1 / 65 / 65






n inputs m outputs
Combinational
Circuits
û
Princess Sumaya University Princess Sumaya University 4241 4241 – – Digital Logic Design Digital Logic Design Computer Engineering Dept. Computer Engineering Dept.
Combinational Circuits Combinational Circuits
«Analysis
? Given a circuit, find out its function
? Function may be expressed as:
? Boolean function
? Truth table
«Design
? Given a desired function, determine its circuit
? Function may be expressed as:
? Boolean function
? Truth table
2 2 / 65 / 65
?
?
?
Page 4


Princess Sumaya Univ.
Computer Engineering Dept.
Princess Sumaya University Princess Sumaya University 4241 4241 – – Digital Logic Design Digital Logic Design Computer Engineering Dept. Computer Engineering Dept.
Combinational Circuits Combinational Circuits
«Output is function of input only
i.e. no feedback
When input changes, output may change (after a delay)
1 1 / 65 / 65






n inputs m outputs
Combinational
Circuits
û
Princess Sumaya University Princess Sumaya University 4241 4241 – – Digital Logic Design Digital Logic Design Computer Engineering Dept. Computer Engineering Dept.
Combinational Circuits Combinational Circuits
«Analysis
? Given a circuit, find out its function
? Function may be expressed as:
? Boolean function
? Truth table
«Design
? Given a desired function, determine its circuit
? Function may be expressed as:
? Boolean function
? Truth table
2 2 / 65 / 65
?
?
?
Princess Sumaya University Princess Sumaya University 4241 4241 – – Digital Logic Design Digital Logic Design Computer Engineering Dept. Computer Engineering Dept.
Analysis Procedure Analysis Procedure
«Boolean Expression Approach
3 3 / 65 / 65
ABC
A+B+C
AB+AC+BC
(A’+B’)(A’+C’)(B’+C’)
AB'C'+A'BC'+A'B'C
F
1
=AB'C'+A'BC'+A'B'C+ABC
F
2
=AB+AC+BC
Page 5


Princess Sumaya Univ.
Computer Engineering Dept.
Princess Sumaya University Princess Sumaya University 4241 4241 – – Digital Logic Design Digital Logic Design Computer Engineering Dept. Computer Engineering Dept.
Combinational Circuits Combinational Circuits
«Output is function of input only
i.e. no feedback
When input changes, output may change (after a delay)
1 1 / 65 / 65






n inputs m outputs
Combinational
Circuits
û
Princess Sumaya University Princess Sumaya University 4241 4241 – – Digital Logic Design Digital Logic Design Computer Engineering Dept. Computer Engineering Dept.
Combinational Circuits Combinational Circuits
«Analysis
? Given a circuit, find out its function
? Function may be expressed as:
? Boolean function
? Truth table
«Design
? Given a desired function, determine its circuit
? Function may be expressed as:
? Boolean function
? Truth table
2 2 / 65 / 65
?
?
?
Princess Sumaya University Princess Sumaya University 4241 4241 – – Digital Logic Design Digital Logic Design Computer Engineering Dept. Computer Engineering Dept.
Analysis Procedure Analysis Procedure
«Boolean Expression Approach
3 3 / 65 / 65
ABC
A+B+C
AB+AC+BC
(A’+B’)(A’+C’)(B’+C’)
AB'C'+A'BC'+A'B'C
F
1
=AB'C'+A'BC'+A'B'C+ABC
F
2
=AB+AC+BC
Princess Sumaya University Princess Sumaya University 4241 4241 – – Digital Logic Design Digital Logic Design Computer Engineering Dept. Computer Engineering Dept.
Analysis Procedure Analysis Procedure
«Truth Table Approach
4 4 / 65 / 65
A  B  C F
1
F
2
0   0   0
= 0
= 0
= 0
= 0
= 0
= 0
= 0
= 0
= 0
= 0
= 0
= 0
0
0
0
0
0
0
1
0
0
0        0