How instructions and data are accessed to pipeline stages of 80486 processor?a)Through internal unified cacheb)Through external unified cachec)Through external cached)Through multiple cachesCorrect answer is option 'A'. Can you explain this answer? - EduRev Computer Science Engineering (CSE) Question

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How instructions and data are accessed to pipeline stages of 80486 processor?

a)
Through internal unified cache
b)
Through external unified cache
c)
Through external cache
d)
Through multiple caches

Correct answer is option 'A'. Can you explain this answer?

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How instructions and data are accessed to pipeline stages of 80486 pro...

Explanation: In order to have instruction and data to the pipeline, the 80486 has an internal unified cache to contain both data and instructions. This helps in the independency of the processor on external memory.

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How instructions and data are accessed to pipeline stages of 80486 processor?a)Through internal unified cacheb)Through external unified cachec)Through external cached)Through multiple cachesCorrect answer is option 'A'. Can you explain this answer?

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