Explanation:

To enable RST 5.5, RST 6.5 and RST 7.5 interrupts in 8085 microprocessor, both EI and SIM instructions are needed. Let’s discuss both of these instructions in detail:

1. EI (Enable Interrupts) Instruction:

EI instruction is used to enable the maskable interrupts in 8085 microprocessor. When this instruction is executed, the interrupt enable flip-flop (IEF) is set and the microprocessor is enabled to respond to the maskable interrupts. The EI instruction is a one-byte instruction with the opcode 0xFB.

2. SIM (Set Interrupt Mask) Instruction:

SIM instruction is used to set the interrupt mask bits in the status register of 8085 microprocessor. The SIM instruction is a one-byte instruction with the opcode 0x30. The status register contains 8 bits, out of which the lower 3 bits are used to enable or disable the RST 5.5, RST 6.5, and RST 7.5 interrupts.

When the SIM instruction is executed, the lower 3 bits of the status register are loaded with the content of the accumulator. The content of the accumulator determines which interrupts will be enabled or disabled. The following table shows the value of the accumulator and the corresponding interrupts enabled or disabled:

| Accumulator Value | Interrupts Enabled |
|-------------------|----------------------|
| 0x07 | RST 5.5, RST 6.5, RST 7.5 |
| 0x06 | RST 5.5, RST 6.5 |
| 0x05 | RST 5.5, RST 7.5 |
| 0x04 | RST 5.5 |
| 0x03 | RST 6.5, RST 7.5 |
| 0x02 | RST 6.5 |
| 0x01 | RST 7.5 |
| 0x00 | No Interrupt |

Conclusion:

Hence, to enable RST 5.5, RST 6.5 and RST 7.5 interrupts in 8085 microprocessor, both the EI and SIM instructions are needed. The EI instruction enables the maskable interrupts, and the SIM instruction sets the interrupt mask bits to enable or disable the desired interrupts.