Demultiplexer:
A demultiplexer (or demux) is a combinational logic circuit that takes in one input and distributes it to one of the multiple output lines based on the selection inputs. In other words, it allows the selection of one output line from multiple possible output lines based on the value of the selection inputs.

Function and Structure:
The demultiplexer has one data input and a number of selection inputs, which determine the output line to which the input data is directed. The demultiplexer has several outputs, each corresponding to one output line. The number of selection inputs determines the total number of output lines available.

Working:
When the selection inputs are applied, they determine the binary code representing the desired output line. The input data is then directed to the corresponding output line, while all other output lines remain inactive.

Example:
Let's consider a 1-to-4 demultiplexer. It has one data input (D), two selection inputs (S1 and S0), and four output lines (Y0, Y1, Y2, Y3). The selection inputs can be used to represent the binary code of the desired output line.

Truth Table:
The truth table for the 1-to-4 demultiplexer would be as follows:

S1 | S0 | D | Y0 | Y1 | Y2 | Y3
------------------------------
0 | 0 | D | 1 | 0 | 0 | 0
0 | 1 | D | 0 | 1 | 0 | 0
1 | 0 | D | 0 | 0 | 1 | 0
1 | 1 | D | 0 | 0 | 0 | 1

Explanation:
The demultiplexer has one data input (D) and a number of selection inputs (S1 and S0). Based on the values of S1 and S0, the input data D is directed to one of the four output lines (Y0, Y1, Y2, Y3). The output lines that are not selected remain inactive (0), while the selected output line becomes active (1).

Therefore, a demultiplexer has one data input and a number of selection inputs, and several outputs, as stated in option 'A'.