Electronics and Communication Engineering (EC) 2010 GATE Paper without solution

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``` Page 1

?EC? GATE 2010
Q. No. 1 – 25 Carry One Mark Each
1. The eigen values of a skew-symmetric matrix are
(A) always zero (B) always pure imaginary
(C) either zero or pure imaginary (D) always real
2. The trigonometric Fourier series for the waveform f(t) shown below contains
(A) only cosine terms and zero value for the dc component
(B) only cosine terms and a positive value for the dc component
(C) only cosine terms and a negative value for the dc component
(D) only sine terms and a negative for the dc component
3. A function n(x) satisfied the differential equation
( ) ()
2
22
dn x n x
0
dx L
- = where L is a
constant. The boundary conditions are: n(0)=K and n ( 8 ) = 0. The solution to this
equation is
(A)  n(x) = K exp(x/L) (B) n(x) = K exp(-x/ L )
(C)  n(x) = K
2
exp(-x/L) (D) n(x) = K exp(-x/L)
4. For the two-port network shown below, the short-circuit admittance parameter
matrix is
42
(A) S
24
- ??
??
-
??

10.5
(B) S
0.5 1
- ? ?
? ?
-
? ?

10.5
(C) S
0.5 1
? ?
? ?
? ?
42
(D) S
24
??
??
??
f(t)
A
0.5 O
0.5 O
0.5 O
2’
1’
1
2
Page 2

?EC? GATE 2010
Q. No. 1 – 25 Carry One Mark Each
1. The eigen values of a skew-symmetric matrix are
(A) always zero (B) always pure imaginary
(C) either zero or pure imaginary (D) always real
2. The trigonometric Fourier series for the waveform f(t) shown below contains
(A) only cosine terms and zero value for the dc component
(B) only cosine terms and a positive value for the dc component
(C) only cosine terms and a negative value for the dc component
(D) only sine terms and a negative for the dc component
3. A function n(x) satisfied the differential equation
( ) ()
2
22
dn x n x
0
dx L
- = where L is a
constant. The boundary conditions are: n(0)=K and n ( 8 ) = 0. The solution to this
equation is
(A)  n(x) = K exp(x/L) (B) n(x) = K exp(-x/ L )
(C)  n(x) = K
2
exp(-x/L) (D) n(x) = K exp(-x/L)
4. For the two-port network shown below, the short-circuit admittance parameter
matrix is
42
(A) S
24
- ??
??
-
??

10.5
(B) S
0.5 1
- ? ?
? ?
-
? ?

10.5
(C) S
0.5 1
? ?
? ?
? ?
42
(D) S
24
??
??
??
f(t)
A
0.5 O
0.5 O
0.5 O
2’
1’
1
2
?EC? GATE 2010
5. For parallel RLC circuit, which one of the following statements is NOT correct?
(A) The bandwidth of the circuit deceases if R is increased
(B) The bandwidth of the circuit remains same if L is increased
(C) At resonance, input impedance is a real quantity
(D) At resonance, the magnitude of input impedance attains its minimum value.
6. At room temperature, a possible value for the mobility of electrons in the inversion
layer of a silicon n-channel MOSFET is
(A) 450 cm
2
/V
-s
(B) 1350 cm
2
/V
-s
(C) 1800 cm
2
/V
-s
(D) 3600 cm
2
/V
-s
7. Thin gate oxide in a CMOS process in preferably grown using
(A) wet oxidation (B) dry oxidation
(C) epitaxial deposition (D) ion implantation
8. In the silicon BJT circuit shown below, assume that the emitter area of transistor
Q1 is half that of transistor Q2.
The value of current I
0
is approximately
(A) 0.5 mA (B) 2mA (C) 9.3 mA (D) 15mA
9. The amplifier circuit shown below uses a silicon transistor. The capacitors C
C
and
C
E
can be assumed to be short at signal frequency and the effect of output
resistance r
0
can be ignored. If C
E
is disconnected from the circuit, which one of
the following statements is TRUE?
~
V
CC
=9V
R
C
=2.7K O
C
C

C
C

R
B
=800K O
V
S

R
E
=0.3 K O
C
E

R
0

V
0

ß=100
V
|

R=9.3K O
I
0

Q2
(ß
2
=715)
(ß
1
=700)
Q1
-10 V
Page 3

?EC? GATE 2010
Q. No. 1 – 25 Carry One Mark Each
1. The eigen values of a skew-symmetric matrix are
(A) always zero (B) always pure imaginary
(C) either zero or pure imaginary (D) always real
2. The trigonometric Fourier series for the waveform f(t) shown below contains
(A) only cosine terms and zero value for the dc component
(B) only cosine terms and a positive value for the dc component
(C) only cosine terms and a negative value for the dc component
(D) only sine terms and a negative for the dc component
3. A function n(x) satisfied the differential equation
( ) ()
2
22
dn x n x
0
dx L
- = where L is a
constant. The boundary conditions are: n(0)=K and n ( 8 ) = 0. The solution to this
equation is
(A)  n(x) = K exp(x/L) (B) n(x) = K exp(-x/ L )
(C)  n(x) = K
2
exp(-x/L) (D) n(x) = K exp(-x/L)
4. For the two-port network shown below, the short-circuit admittance parameter
matrix is
42
(A) S
24
- ??
??
-
??

10.5
(B) S
0.5 1
- ? ?
? ?
-
? ?

10.5
(C) S
0.5 1
? ?
? ?
? ?
42
(D) S
24
??
??
??
f(t)
A
0.5 O
0.5 O
0.5 O
2’
1’
1
2
?EC? GATE 2010
5. For parallel RLC circuit, which one of the following statements is NOT correct?
(A) The bandwidth of the circuit deceases if R is increased
(B) The bandwidth of the circuit remains same if L is increased
(C) At resonance, input impedance is a real quantity
(D) At resonance, the magnitude of input impedance attains its minimum value.
6. At room temperature, a possible value for the mobility of electrons in the inversion
layer of a silicon n-channel MOSFET is
(A) 450 cm
2
/V
-s
(B) 1350 cm
2
/V
-s
(C) 1800 cm
2
/V
-s
(D) 3600 cm
2
/V
-s
7. Thin gate oxide in a CMOS process in preferably grown using
(A) wet oxidation (B) dry oxidation
(C) epitaxial deposition (D) ion implantation
8. In the silicon BJT circuit shown below, assume that the emitter area of transistor
Q1 is half that of transistor Q2.
The value of current I
0
is approximately
(A) 0.5 mA (B) 2mA (C) 9.3 mA (D) 15mA
9. The amplifier circuit shown below uses a silicon transistor. The capacitors C
C
and
C
E
can be assumed to be short at signal frequency and the effect of output
resistance r
0
can be ignored. If C
E
is disconnected from the circuit, which one of
the following statements is TRUE?
~
V
CC
=9V
R
C
=2.7K O
C
C

C
C

R
B
=800K O
V
S

R
E
=0.3 K O
C
E

R
0

V
0

ß=100
V
|

R=9.3K O
I
0

Q2
(ß
2
=715)
(ß
1
=700)
Q1
-10 V
?EC? GATE 2010
(A) The input resistance R
i
increases and the magnitude of voltage gain A
V

decreases
(B) The input resistance R
i
decreases and the magnitude of voltage gain A
V

decreases
(C) Both input resistance R
i
and the magnitude of voltage gain A
V
decrease
(D) Both input resistance R
i
and the magnitude of voltage gain A
V
increase
10. Assuming the OP-AMP to be ideal, the voltage gain of the amplifier shown below is
2
1
R
(A)
R
-
3
1
R
(B)
R
-
23
1
RR
(C)
R
-
23
1
RR
(D)
R
?? +
-
??
??
11. Match the logic ga5tes in Column A with their equivalents in Column B.

(A) P–2, Q-4, R-1, S-3 (B) P-4, Q-2, R-1, S-3
(C) P–2, Q-4, R-3, S-1 (D) P-4, Q-2, R-3, S-1
V
0

+
R
1

R
2

R
3

+
-
V
i

Column B Column A
P
Q
R
S
1
2
3
4
Page 4

?EC? GATE 2010
Q. No. 1 – 25 Carry One Mark Each
1. The eigen values of a skew-symmetric matrix are
(A) always zero (B) always pure imaginary
(C) either zero or pure imaginary (D) always real
2. The trigonometric Fourier series for the waveform f(t) shown below contains
(A) only cosine terms and zero value for the dc component
(B) only cosine terms and a positive value for the dc component
(C) only cosine terms and a negative value for the dc component
(D) only sine terms and a negative for the dc component
3. A function n(x) satisfied the differential equation
( ) ()
2
22
dn x n x
0
dx L
- = where L is a
constant. The boundary conditions are: n(0)=K and n ( 8 ) = 0. The solution to this
equation is
(A)  n(x) = K exp(x/L) (B) n(x) = K exp(-x/ L )
(C)  n(x) = K
2
exp(-x/L) (D) n(x) = K exp(-x/L)
4. For the two-port network shown below, the short-circuit admittance parameter
matrix is
42
(A) S
24
- ??
??
-
??

10.5
(B) S
0.5 1
- ? ?
? ?
-
? ?

10.5
(C) S
0.5 1
? ?
? ?
? ?
42
(D) S
24
??
??
??
f(t)
A
0.5 O
0.5 O
0.5 O
2’
1’
1
2
?EC? GATE 2010
5. For parallel RLC circuit, which one of the following statements is NOT correct?
(A) The bandwidth of the circuit deceases if R is increased
(B) The bandwidth of the circuit remains same if L is increased
(C) At resonance, input impedance is a real quantity
(D) At resonance, the magnitude of input impedance attains its minimum value.
6. At room temperature, a possible value for the mobility of electrons in the inversion
layer of a silicon n-channel MOSFET is
(A) 450 cm
2
/V
-s
(B) 1350 cm
2
/V
-s
(C) 1800 cm
2
/V
-s
(D) 3600 cm
2
/V
-s
7. Thin gate oxide in a CMOS process in preferably grown using
(A) wet oxidation (B) dry oxidation
(C) epitaxial deposition (D) ion implantation
8. In the silicon BJT circuit shown below, assume that the emitter area of transistor
Q1 is half that of transistor Q2.
The value of current I
0
is approximately
(A) 0.5 mA (B) 2mA (C) 9.3 mA (D) 15mA
9. The amplifier circuit shown below uses a silicon transistor. The capacitors C
C
and
C
E
can be assumed to be short at signal frequency and the effect of output
resistance r
0
can be ignored. If C
E
is disconnected from the circuit, which one of
the following statements is TRUE?
~
V
CC
=9V
R
C
=2.7K O
C
C

C
C

R
B
=800K O
V
S

R
E
=0.3 K O
C
E

R
0

V
0

ß=100
V
|

R=9.3K O
I
0

Q2
(ß
2
=715)
(ß
1
=700)
Q1
-10 V
?EC? GATE 2010
(A) The input resistance R
i
increases and the magnitude of voltage gain A
V

decreases
(B) The input resistance R
i
decreases and the magnitude of voltage gain A
V

decreases
(C) Both input resistance R
i
and the magnitude of voltage gain A
V
decrease
(D) Both input resistance R
i
and the magnitude of voltage gain A
V
increase
10. Assuming the OP-AMP to be ideal, the voltage gain of the amplifier shown below is
2
1
R
(A)
R
-
3
1
R
(B)
R
-
23
1
RR
(C)
R
-
23
1
RR
(D)
R
?? +
-
??
??
11. Match the logic ga5tes in Column A with their equivalents in Column B.

(A) P–2, Q-4, R-1, S-3 (B) P-4, Q-2, R-1, S-3
(C) P–2, Q-4, R-3, S-1 (D) P-4, Q-2, R-3, S-1
V
0

+
R
1

R
2

R
3

+
-
V
i

Column B Column A
P
Q
R
S
1
2
3
4
?EC? GATE 2010
12. For the output F to be 1 in the logic circuit shown, the input combination should be
(A) A = 1, B= 1. C = 0 (B) A = 1, B= 0,C = 0
(C) A = 0, B= 1. C = 0 (D) A = 0, B= 0, C = 1
13. In the circuit shown, the device connected to Y5 can have address in the range
(A) 2000 - 20FF (B) 2D00 – 2DFF (C) 2E00 – 2EFF (D) FD00 - FDFF
14. Consider the z-transform X(z) = 5z
2
+ 4z
-1
+ 3; 0<|z| < 8 . The inverse z-
transform x[n]  is
(A) 5d[n + 2] + 3d[n] + 4d[n – 1] (B) 5d[n - 2] + 3d[n] + 4d[n + 1]
(C) 5 u[n + 2] + 3 u[n] + 4 u[n – 1] (D) 5 u[n - 2] + 3 u[n] + 4 u[n + 1]
15. Two discrete time systems with impulse responses h
1
[n] = d[n -1] and h
2
[n] = d[n
– 2] are connected in cascade. The overall impulse response of the cascaded
system is
(A) d[n - 1] + d[n - 2] (B) d[n - 4]
(C) d[n - 3] (D) d[n - 1] d[n - 2]
16. For an N-point FFT algorithm with N = 2
m
which one of the following statements is
TRUE?
(A) It is not possible to construct a signal flow graph with both input and output in
normal order
(B) The number of butterflies in the m
th
stage is N/m
F
A
B
C
To device
Chip select
V
CC
GND
A11
A12
A13
A14
A15
A
B
A8
A9
A10
Y5
74LS138
3-to-8
decoder
G2
G2
G1
10 /M
Page 5

?EC? GATE 2010
Q. No. 1 – 25 Carry One Mark Each
1. The eigen values of a skew-symmetric matrix are
(A) always zero (B) always pure imaginary
(C) either zero or pure imaginary (D) always real
2. The trigonometric Fourier series for the waveform f(t) shown below contains
(A) only cosine terms and zero value for the dc component
(B) only cosine terms and a positive value for the dc component
(C) only cosine terms and a negative value for the dc component
(D) only sine terms and a negative for the dc component
3. A function n(x) satisfied the differential equation
( ) ()
2
22
dn x n x
0
dx L
- = where L is a
constant. The boundary conditions are: n(0)=K and n ( 8 ) = 0. The solution to this
equation is
(A)  n(x) = K exp(x/L) (B) n(x) = K exp(-x/ L )
(C)  n(x) = K
2
exp(-x/L) (D) n(x) = K exp(-x/L)
4. For the two-port network shown below, the short-circuit admittance parameter
matrix is
42
(A) S
24
- ??
??
-
??

10.5
(B) S
0.5 1
- ? ?
? ?
-
? ?

10.5
(C) S
0.5 1
? ?
? ?
? ?
42
(D) S
24
??
??
??
f(t)
A
0.5 O
0.5 O
0.5 O
2’
1’
1
2
?EC? GATE 2010
5. For parallel RLC circuit, which one of the following statements is NOT correct?
(A) The bandwidth of the circuit deceases if R is increased
(B) The bandwidth of the circuit remains same if L is increased
(C) At resonance, input impedance is a real quantity
(D) At resonance, the magnitude of input impedance attains its minimum value.
6. At room temperature, a possible value for the mobility of electrons in the inversion
layer of a silicon n-channel MOSFET is
(A) 450 cm
2
/V
-s
(B) 1350 cm
2
/V
-s
(C) 1800 cm
2
/V
-s
(D) 3600 cm
2
/V
-s
7. Thin gate oxide in a CMOS process in preferably grown using
(A) wet oxidation (B) dry oxidation
(C) epitaxial deposition (D) ion implantation
8. In the silicon BJT circuit shown below, assume that the emitter area of transistor
Q1 is half that of transistor Q2.
The value of current I
0
is approximately
(A) 0.5 mA (B) 2mA (C) 9.3 mA (D) 15mA
9. The amplifier circuit shown below uses a silicon transistor. The capacitors C
C
and
C
E
can be assumed to be short at signal frequency and the effect of output
resistance r
0
can be ignored. If C
E
is disconnected from the circuit, which one of
the following statements is TRUE?
~
V
CC
=9V
R
C
=2.7K O
C
C

C
C

R
B
=800K O
V
S

R
E
=0.3 K O
C
E

R
0

V
0

ß=100
V
|

R=9.3K O
I
0

Q2
(ß
2
=715)
(ß
1
=700)
Q1
-10 V
?EC? GATE 2010
(A) The input resistance R
i
increases and the magnitude of voltage gain A
V

decreases
(B) The input resistance R
i
decreases and the magnitude of voltage gain A
V

decreases
(C) Both input resistance R
i
and the magnitude of voltage gain A
V
decrease
(D) Both input resistance R
i
and the magnitude of voltage gain A
V
increase
10. Assuming the OP-AMP to be ideal, the voltage gain of the amplifier shown below is
2
1
R
(A)
R
-
3
1
R
(B)
R
-
23
1
RR
(C)
R
-
23
1
RR
(D)
R
?? +
-
??
??
11. Match the logic ga5tes in Column A with their equivalents in Column B.

(A) P–2, Q-4, R-1, S-3 (B) P-4, Q-2, R-1, S-3
(C) P–2, Q-4, R-3, S-1 (D) P-4, Q-2, R-3, S-1
V
0

+
R
1

R
2

R
3

+
-
V
i

Column B Column A
P
Q
R
S
1
2
3
4
?EC? GATE 2010
12. For the output F to be 1 in the logic circuit shown, the input combination should be
(A) A = 1, B= 1. C = 0 (B) A = 1, B= 0,C = 0
(C) A = 0, B= 1. C = 0 (D) A = 0, B= 0, C = 1
13. In the circuit shown, the device connected to Y5 can have address in the range
(A) 2000 - 20FF (B) 2D00 – 2DFF (C) 2E00 – 2EFF (D) FD00 - FDFF
14. Consider the z-transform X(z) = 5z
2
+ 4z
-1
+ 3; 0<|z| < 8 . The inverse z-
transform x[n]  is
(A) 5d[n + 2] + 3d[n] + 4d[n – 1] (B) 5d[n - 2] + 3d[n] + 4d[n + 1]
(C) 5 u[n + 2] + 3 u[n] + 4 u[n – 1] (D) 5 u[n - 2] + 3 u[n] + 4 u[n + 1]
15. Two discrete time systems with impulse responses h
1
[n] = d[n -1] and h
2
[n] = d[n
– 2] are connected in cascade. The overall impulse response of the cascaded
system is
(A) d[n - 1] + d[n - 2] (B) d[n - 4]
(C) d[n - 3] (D) d[n - 1] d[n - 2]
16. For an N-point FFT algorithm with N = 2
m
which one of the following statements is
TRUE?
(A) It is not possible to construct a signal flow graph with both input and output in
normal order
(B) The number of butterflies in the m
th
stage is N/m
F
A
B
C
To device
Chip select
V
CC
GND
A11
A12
A13
A14
A15
A
B
A8
A9
A10
Y5
74LS138
3-to-8
decoder
G2
G2
G1
10 /M
?EC? GATE 2010
(C) In-place computation requires storage of only 2N node data
(D) Computation of a butterfly requires only one complex multiplication
17. The transfer function Y(s)/R(s) of the system shown is

(A) 0
1
(B)
s1 +
2
(C)
s1 +
2
(D)
s3 +
18. A system with transfer function
( )
()
Ys
Xs
=
s
sp +
has an output y(t) = cos 2t
3
p ??
-
??
??
for
the input signal x(t) = p cos 2t
2
p ??
-
??
??
. Then, the system parameter ‘p’ is
(A) 3 (B)
2
3
(C) 1 (D)
3
2
19. For the asymptotic Bode magnitude plot shown below, the system transfer function
can be
10s 1
(A)
0.1s 1
+
+
100s 1
(B)
0.1s 1
+
+
100s
(C)
10s 1 +
0.1s 1
(D)
10s 1
+
+
20. Suppose that the modulating signal is m(t) = 2cos (2p f
m
t) and the carrier signal is
x
C
(t) = A
C
cos(2pf
c
t), which one of the following is a conventional AM signal
without over-modulation?
(A) x(t) = A
c
m(t) cos(2pf
c
t)
(B) x(t) = A
c
[1 + m(t)]cos(2pf
c
t)
(C) x(t) = A
c
cos(2pf
c
t) +
C
A
4
m(t) cos(2pf
c
t)
(D) x(t) = A
c
cos(2pf
m
t) cos(2pf
c
t) + A
c
sin(2pf
m
t) sin(2pf
c
t)
40.
0
0.001 0.1 10 1000
Magnitude (db)
R(s)
+
-
S
S
Y(s)
1
s1 +
1
s1 +
-
+
```

## FAQs on Electronics and Communication Engineering (EC) 2010 GATE Paper without solution

 1. What is Electronics and Communication Engineering (EC)?
Ans. Electronics and Communication Engineering (EC) is a field of engineering that deals with the design, development, and implementation of electronic devices and communication systems. It involves the study of electronic circuits, communication systems, microprocessors, digital signal processing, and other related subjects.
 2. What does the GATE exam for Electronics and Communication Engineering (EC) entail?
Ans. The GATE (Graduate Aptitude Test in Engineering) exam for Electronics and Communication Engineering (EC) is a national level examination conducted in India. It tests the comprehensive understanding of various subjects in EC, including electronic devices and circuits, digital electronics, analog and digital communication, control systems, electromagnetic fields, and network theory.
 3. Can you provide some tips for preparation for the EC GATE exam?
Ans. Here are some tips for preparing for the EC GATE exam: - Understand the exam pattern and syllabus thoroughly. - Create a study plan and allocate time for each subject. - Refer to standard textbooks and study materials for in-depth understanding. - Practice previous years' question papers and take mock tests to assess your preparation level. - Focus on problem-solving skills and time management during the exam. - Stay updated with the latest developments and advancements in the field of electronics and communication engineering.
 4. What are the career prospects for Electronics and Communication Engineering (EC) graduates?
Ans. Electronics and Communication Engineering (EC) graduates have a wide range of career opportunities. They can work in industries such as telecommunications, electronics manufacturing, semiconductor design, research and development, software development, and information technology. They can also pursue higher studies and research in specialized areas of EC or opt for teaching positions in universities and colleges.
 5. How can the GATE exam benefit Electronics and Communication Engineering (EC) graduates?
Ans. The GATE exam serves as a gateway for EC graduates to pursue higher education, such as M.Tech and Ph.D., in prestigious institutions in India and abroad. Many universities and research organizations consider GATE scores for admission to postgraduate programs. Additionally, several public sector undertakings (PSUs) recruit candidates based on their GATE scores. The GATE exam also helps in testing the knowledge and understanding of EC concepts, which can be beneficial for career growth and job opportunities.
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