A computer system with a word length of 32 bits has a 16 MB byte-addressable main memory and a 64 KB, 4-way set associative cache memory with a block size of 256 bytes. Consider the following tour physical addresses represented in hexadecimal notation.
A1 = 0x42C8A4, A2 = 0x546888, A3 = 0x6A289C, A4 = 0x5E4880
Which one of the following is TRUE?
a)
A1 and A3 are mapped to the same cache set.
b)
A2 and A3 are mapped to the same cache set.
c)
A3 and A4 are mapped to the same cache set.
d)
A1 and A4 are mapped to different cache sets.
Correct answer is option 'B'. Can you explain this answer?

Question

A computer system with a word length of 32 bits has a 16 MB byte-addressable main memory and a 64 KB, 4-way set associative cache memory with a block size of 256 bytes. Consider the following tour physical addresses represented in hexadecimal notation.
A1 = 0x42C8A4, A2 = 0x546888, A3 = 0x6A289C, A4 = 0x5E4880
Which one of the following is TRUE?

a)
A1 and A3 are mapped to the same cache set.
b)
A2 and A3 are mapped to the same cache set.
c)
A3 and A4 are mapped to the same cache set.
d)
A1 and A4 are mapped to different cache sets.

Correct answer is option 'B'. Can you explain this answer?

Answer

Explanation:

Word length = 32 bits

Main memory size = 16 MB = 2^24 bytes

Cache memory size = 64 KB = 2^16 bytes

Block size = 256 bytes = 2^8 bytes

Cache memory is 4-way set associative, so there are 4 cache sets.

Calculations:

Cache index bits = log2(cache sets) = log2(4) = 2 bits

Block offset bits = log2(block size) = log2(256) = 8 bits

Tag bits = word length - cache index bits - block offset bits = 32 - 2 - 8 = 22 bits

Address Mapping:

Address A1 = 0x42C8A4

Cache index = last 2 bits of address = 0b00

Block offset = last 8 bits of address = 0xA4

Tag = remaining 22 bits of address = 0x42C8

Address A2 = 0x546888

Cache index = last 2 bits of address = 0b00

Block offset = last 8 bits of address = 0x88

Tag = remaining 22 bits of address = 0x5468

Address A3 = 0x6A289C

Cache index = last 2 bits of address = 0b01

Block offset = last 8 bits of address = 0x9C

Tag = remaining 22 bits of address = 0x6A28

Address A4 = 0x5E4880

Cache index = last 2 bits of address = 0b00

Block offset = last 8 bits of address = 0x80

Tag = remaining 22 bits of address = 0x5E48

Answer:

Addresses A2 and A3 have the same cache index (0b00), so they are mapped to the same cache set. Therefore, option (b) is the correct answer.

Addresses A1 and A4 have different cache indexes (0b00 and 0b10), so they are mapped to different cache sets. Therefore, option (d) is incorrect.

Address A3 has a different cache index (0b01) than any other address, so it is not mapped to the same cache set as any other address. Therefore, option (a) and option (c) are incorrect.

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